# UCC2813DTR-2

**Texas Instruments** · AC-DC Controllers And Regulators · SOIC-8

UCC2813DTR-2 from Texas Instruments, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | COMP | output | COMP is the error amplifier output and the PWM comparator input, with feedback loop compensation applied between this pin and FB, and the internal error amplifier has a current limit. |
| 2 | FB | input | FB is the inverting input of the error amplifier, and its trace should be kept short with minimal stray capacitance for best stability. |
| 3 | CS | input | CS is the input to the current-sense comparators (PWM and overcurrent), connected directly to the MOSFET source sense resistor, with 100 ns internal leading-edge blanking. |
| 4 | RC | input | RC is the oscillator timing pin, where an external resistor from REF and a capacitor to GND set the switching frequency and maximum duty cycle; the datasheet recommends RT of 10 kΩ to 200 kΩ and CT of 100 pF to 1000 pF and says RT must never be below 10 kΩ. |
| 5 | GND | power_in | GND is the reference ground and power ground for all device functions, and the datasheet recommends separating the signal return path from the high-current gate-driver path. |
| 6 | OUT | output | OUT is the high-current power driver output for the power MOSFET gate, capable of peak drive current above ±750 mA (up to ±1 A), and is actively held low when VCC is below the UVLO threshold. |
| 7 | VCC | power_in | VCC is the device bias supply input, normally fed from a low-impedance source through a current-limiting resistor and bypassed to GND with a 0.1 µF ceramic capacitor, with an internal zener clamp of about 13.5 V typical and a 12 V absolute maximum supply rating. |
| 8 | REF | output | REF is the voltage reference for the error amplifier and logic supply, providing 5 V for UCCx813-[0,1,2,4] (4 V for UCCx813-[3,5]), and requires a ceramic bypass capacitor of at least 0.1 µF to GND with a recommended REF output current of 5 mA maximum. |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SOIC-8 |
| Category | Power Management (PMIC) |
| Pins | 8 |

## CAD (KiCad official)

- Symbol: `UCC2813DTR-2`
- Footprint: `Package_SO:SOIC-8_3.9x4.9mm_P1.27mm`
- 3D model: SOIC-8 (KiCad packages3D, STEP)
- 3D model files: `ucc2813dtr-2-etched.step` / `ucc2813dtr-2-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `ucc2813dtr-2.step` / `ucc2813dtr-2.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/ucc3813-0) (53 pp, sha256 `e691a7fcf4f2163a`, retrieved 2026-10-07, tier: lcsc)
- **Datasheet language:** Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/ucc2813dtr-2-datasheet.pdf)