ucc28061dr

{
  "slug": "ucc28061dr",
  "version": "0.1.0",
  "type": "component",
  "description": "Texas Instruments AC-DC Controllers And Regulators, SOIC-16. Datasheet-verified pinout, KiCad symbol/footprint/3D.",
  "tags": [
    "component",
    "power management (pmic)",
    "ucc28061dr",
    "factory-2.0.0",
    "extractor-text"
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    "ucc28061dr.lbr",
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    "docs/ucc28061dr-datasheet.pdf",
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  "component": {
    "mpn": "UCC28061DR",
    "manufacturer": "Texas Instruments",
    "package": "SOIC-16",
    "pin_count": 16,
    "category": "Power Management (PMIC)",
    "subcategory": "AC-DC Controllers And Regulators",
    "datasheet": "https://www.ti.com/lit/ds/symlink/ucc28061.pdf",
    "parts": {
      "symbol": "ucc28061dr.kicad_sym",
      "footprint": "ucc28061dr.kicad_mod",
      "model_3d": "ucc28061dr-etched.glb",
      "model_3d_plain": "ucc28061dr.glb",
      "model_3d_step": "ucc28061dr-etched.step",
      "model_3d_step_plain": "ucc28061dr.step",
      "lbr": "ucc28061dr.lbr"
    },
    "distributor_links": {
      "lcsc": "C523749"
    },
    "pins": [
      {
        "number": "1",
        "name": "ZCDB",
        "type": "input",
        "description": "Zero current detection input for phase B with 0-3 V clamp range, 1.0 V falling threshold, and 1.68 V rising threshold for inductor current decay monitoring."
      },
      {
        "number": "2",
        "name": "VSENSE",
        "type": "input",
        "description": "Output voltage sense input for error amplifier feedback with 6 V reference; pullable low by open-drain logic to disable gate drivers."
      },
      {
        "number": "3",
        "name": "TSET",
        "type": "input",
        "description": "Timing resistor connection to AGND that programs on-time factor and minimum switching period proportionally."
      },
      {
        "number": "4",
        "name": "PHB",
        "type": "input",
        "description": "Phase B management input; pull high or to VREF for two-phase operation or to ground for single-phase operation."
      },
      {
        "number": "5",
        "name": "COMP",
        "type": "output",
        "description": "Error amplifier transconductance output with 96 \u00b5S typical gain providing on-time control proportional to (COMP voltage - 125 mV)."
      },
      {
        "number": "6",
        "name": "AGND",
        "type": "power_in",
        "description": "Analog ground connection for bypass capacitors, compensation networks, and low-level analog signal returns."
      },
      {
        "number": "7",
        "name": "VINAC",
        "type": "input",
        "description": "Input AC mains voltage sense input with 1.39 V brownout threshold and 440 ms filter delay time."
      },
      {
        "number": "8",
        "name": "HVSEN",
        "type": "input",
        "description": "High voltage output sense for redundant FailSafe OVP with 4.87 V rising threshold; must stay above 0.8 V during normal operation."
      },
      {
        "number": "9",
        "name": "PWMCNTL",
        "type": "tri_state",
        "description": "Open-drain PWM enable output that pulls low when output voltage in valid range and both ZCD inputs switching correctly in two-phase mode."
      },
      {
        "number": "10",
        "name": "CS",
        "type": "input",
        "description": "Current sense input for shunt resistor with -200 mV rising threshold and -15 mV falling threshold for cycle-by-cycle overcurrent protection."
      },
      {
        "number": "11",
        "name": "GDB",
        "type": "output",
        "description": "Gate drive output for phase B power FET with 1 A source and 1.8 A sink capability and 13 V typical high output voltage."
      },
      {
        "number": "12",
        "name": "VCC",
        "type": "power_in",
        "description": "Bias supply input requiring regulated 14-21 V with 6 mA minimum DC capability plus transient gate charge current."
      },
      {
        "number": "13",
        "name": "PGND",
        "type": "power_in",
        "description": "Power ground for integrated circuit isolated from analog ground via separate dedicated trace."
      },
      {
        "number": "14",
        "name": "GDA",
        "type": "output",
        "description": "Gate drive output for phase A power FET with 1 A source and 1.8 A sink capability and 13 V typical high output voltage."
      },
      {
        "number": "15",
        "name": "VREF",
        "type": "power_out",
        "description": "Reference voltage output providing 6.0 V regulated supply with 2 mA maximum load current capability."
      },
      {
        "number": "16",
        "name": "ZCDA",
        "type": "input",
        "description": "Zero current detection input for phase A with 0-3 V clamp range, 1.0 V falling threshold, and 1.68 V rising threshold for inductor current decay monitoring."
      }
    ],
    "provenance": {
      "extractor": "extract_pins 0.2",
      "factory_chain": {
        "factory": "2.0.0",
        "extractor": "extract_pins 0.2",
        "primary_model": "claude-haiku-4-5-20251001",
        "primary_mode": "text",
        "consensus_model": "claude-sonnet-5",
        "consensus": "agreed",
        "guards": "pin_guards 0.1: passed",
        "guard_notes": [],
        "pages_sent": 36,
        "cost_usd": 0.3814,
        "at": "2026-09-22T21:29:05"
      },
      "datasheet": {
        "url": "https://www.ti.com/lit/ds/symlink/ucc28061.pdf",
        "pages": 36,
        "sha256": "680a4a083278a849",
        "source_tier": "mfr"
      },
      "cad": "KiCad official (CC-BY-SA 4.0)",
      "pins": {
        "total": 16,
        "described": 16,
        "cites_pages": true,
        "refuses_to_fabricate": true
      }
    },
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}