component
UCC12040DVER
Public Made by Adomby adom
Texas Instruments DC-DC Converters, SOIC-16-300mil. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownUCC12040DVER
Texas Instruments · DC-DC Converters · SOIC-16-300mil
UCC12040DVER from Texas Instruments, in a SOIC-16-300mil. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | EN | input | Enable pin; forcing EN low disables the device, pull high to enable normal device functionality. |
| 2 | GNDP | power_in | Power ground return connection for VINP. |
| 3 | VINP | power_in | Primary side input supply voltage pin; 4.5 V to 5.5 V operating range with 10-μF ceramic capacitor to GNDP required. |
| 4 | SYNC | input | Synchronous clock input pin; external clock range 14.4 MHz to 17.6 MHz or connect to GNDP for standalone internal oscillator operation. |
| 5 | SYNC_OK | output | Active-low open-drain diagnostic output asserted LOW when external SYNC clock is absent or outside operating range. |
| 6 | NC | unconnected | Internally connected pin for primary-side voltage domain; connect to GNDP on printed circuit board. |
| 7 | NC | unconnected | Internally connected pin for primary-side voltage domain; connect to GNDP on printed circuit board. |
| 8 | NC | unconnected | Internally connected pin for primary-side voltage domain; connect to GNDP on printed circuit board. |
| 9 | GNDS | power_in | Connect to GNDS plane on printed circuit board; ensure pin 15 is connected to circuit ground and do not use as only ground connection for VISO. |
| 10 | NC | unconnected | No internal connection pin for isolated voltage domain; connect to GNDS on printed circuit board. |
| 11 | NC | unconnected | No internal connection pin for isolated voltage domain; connect to GNDS on printed circuit board. |
| 12 | NC | unconnected | No internal connection pin for isolated voltage domain; connect to GNDS on printed circuit board. |
| 13 | SEL | input | VISO selection pin determining output voltage: 5.0 V (shorted to VISO), 5.4 V (100 kΩ to VISO), 3.3 V (shorted to GNDS), or 3.7 V (100 kΩ to GNDS). |
| 14 | VISO | power_out | Isolated supply voltage output pin (3.3 V to 5.4 V selectable) with 10-μF ceramic capacitor to GNDS on pin 15 required. |
| 15 | GNDS | power_in | Secondary side ground return connection for VISO; connect bypass capacitor from VISO to this pin. |
| 16 | GNDS | power_in | Connect to GNDS plane on printed circuit board; ensure pin 15 is connected to circuit ground and do not use as only ground connection for VISO. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SOIC-16-300mil |
| Category | Power Management (PMIC) |
| Pins | 16 |
CAD (KiCad official)
- Symbol:
UCC12040DVER - Footprint:
Package_SO:SOIC-16_3.9x9.9mm_P1.27mm - 3D model: SOIC-16-300mil (KiCad packages3D, STEP)
- 3D model files:
ucc12040dver-etched.step/ucc12040dver-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);ucc12040dver.step/ucc12040dver.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (36 pp, sha256
db9973072db483b2, retrieved 2026-09-26, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.2, primaryclaude-haiku-4-5-20251001(text), consensusclaude-sonnet-4-6(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).