TX4131L

{
  "slug": "tx4131l",
  "version": "0.1.0",
  "type": "component",
  "description": "XDS DC-DC Converters, SOP-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
  "tags": [
    "component",
    "power management (pmic)",
    "tx4131l",
    "factory-2.0.0",
    "extractor-text"
  ],
  "dependencies": {},
  "hero": {
    "type": "image",
    "path": "docs/hero.png"
  },
  "files": [
    "page.json",
    "README.md",
    "tx4131l.kicad_sym",
    "tx4131l.kicad_mod",
    "tx4131l.glb",
    "tx4131l.step",
    "tx4131l.lbr",
    "docs/hero.png",
    "docs/tx4131l-datasheet.pdf",
    "viewers/symbol.html",
    "viewers/footprint.html",
    "tx4131l-hero.glb",
    "tx4131l-hero.overlay.json",
    "tx4131l-etched.glb"
  ],
  "component": {
    "mpn": "TX4131L",
    "manufacturer": "XDS",
    "package": "SOP-8",
    "pin_count": 8,
    "category": "Power Management (PMIC)",
    "subcategory": "DC-DC Converters",
    "datasheet": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8785206431053602816",
    "parts": {
      "symbol": "tx4131l.kicad_sym",
      "footprint": "tx4131l.kicad_mod",
      "model_3d": "tx4131l-hero.glb",
      "model_3d_plain": "tx4131l-etched.glb",
      "model_3d_step": "tx4131l-etched.step",
      "model_3d_step_plain": "tx4131l.step",
      "lbr": "tx4131l.lbr"
    },
    "distributor_links": {
      "lcsc": "C19192514"
    },
    "distributor_check": {
      "checked_at": "2026-10-15T10:02:59Z",
      "source": "Component Ocean /api/assign-pns",
      "digikey": {
        "pn": null,
        "status": "no match"
      },
      "mouser": {
        "pn": null,
        "status": "no match"
      }
    },
    "pins": [
      {
        "number": "1",
        "name": "DRV",
        "type": "output",
        "description": "Drives the gate of the external MOSFET; the DRV pin voltage is stated as 5.5 V with 30 ns typical rise and fall times at a 1 nF load."
      },
      {
        "number": "2",
        "name": "VDD",
        "type": "power_in",
        "description": "Chip supply input; the VDD clamp voltage is 33 V, undervoltage protection turns on at a rising VDD of 6 V and off at a falling VDD of 4 V, and the startup current is 40-100 µA at VDD=5 V."
      },
      {
        "number": "3",
        "name": "FB1",
        "type": "input",
        "description": "Positive input of the output-voltage feedback; FB1 and FB2 are the divider inputs for constant-voltage regulation, with a stated FB1-FB2 difference of 369-391 mV (typically 380 mV) and an absolute limit of -0.3 V to 6 V."
      },
      {
        "number": "4",
        "name": "FB2",
        "type": "input",
        "description": "Negative input of the output-voltage feedback, paired with FB1 to set the constant output voltage; its absolute limit is -0.3 V to 6 V."
      },
      {
        "number": "5",
        "name": "LDO",
        "type": "power_out",
        "description": "Internal 5 V LDO output that requires an external capacitor; the datasheet lists the LDO voltage as 5.5 V, and the absolute limit for this pin is -0.3 V to 6 V."
      },
      {
        "number": "6",
        "name": "VSN",
        "type": "input",
        "description": "Negative input for inductor current sensing; the VSP-VSN voltage drop is 145-155 mV (typically 150 mV) and the absolute limit is -0.3 V to 6 V."
      },
      {
        "number": "7",
        "name": "VSS",
        "type": "power_in",
        "description": "Chip ground pin; the datasheet labels it as chip ground (listed as 'output' in the source text), and it is the reference for the device."
      },
      {
        "number": "8",
        "name": "VSP",
        "type": "input",
        "description": "Positive input for inductor current sensing, used with VSN to set the peak current limit; the absolute limit is -0.3 V to 6 V."
      }
    ],
    "provenance": {
      "extractor": "extract_pins 0.3",
      "factory_chain": {
        "factory": "2.0.0",
        "extractor": "extract_pins 0.3",
        "primary_model": "claude-haiku-5-5",
        "primary_mode": "text",
        "consensus_model": "claude-sonnet-5-5",
        "consensus": "agreed",
        "guards": "pin_guards 0.1: passed",
        "guard_notes": [
          "extractor flagged: Pinout taken from the pin table on page 2 (SOP8 package); the datasheet names the package SOP8 on pa; Pin 7 VSS is described in the source as '芯片地，输出' (chip ground, output). Per KiCad ERC convention GND; The LDO voltage row on page 4 gives a single value of 5.5 V with no min/typ/max column header clarit"
        ],
        "pages_sent": 8,
        "cost_usd": 0.0342,
        "at": "2026-10-15T10:02:44"
      },
      "datasheet": {
        "url": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8785206431053602816",
        "pages": 8,
        "sha256": "6d209f099c99f039",
        "source_tier": "lcsc"
      },
      "cad": "KiCad official (CC-BY-SA 4.0)",
      "pins": {
        "total": 8,
        "described": 8,
        "cites_pages": true,
        "refuses_to_fabricate": true
      }
    },
    "viewers": {
      "symbol": "viewers/symbol.html",
      "footprint": "viewers/footprint.html"
    },
    "models_3d": [
      {
        "file": "tx4131l.step",
        "role": "plain",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          6.0,
          4.9,
          1.75
        ],
        "zmin_mm": -0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "07f46cff378d30e6c27dfd5a03092c795323f86d91c71fc7e743f4f418dc553a",
        "checked": "2026-10-15",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      },
      {
        "file": "tx4131l-etched.step",
        "role": "eda",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          6.0,
          4.9,
          1.75
        ],
        "zmin_mm": -0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "1a6131fae5bd71863d0c5f2b659cb65c906d227915d8bcff9863cc45a03fd5b2",
        "checked": "2026-10-15",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      }
    ]
  }
}