TSER953RHBT

{
  "slug": "tser953rhbt",
  "version": "0.1.0",
  "type": "component",
  "description": "Texas Instruments Serializers / Deserializers, VQFN-32(5x5). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
  "tags": [
    "component",
    "interface ics",
    "tser953rhbt",
    "factory-2.0.0",
    "extractor-text"
  ],
  "dependencies": {},
  "hero": {
    "type": "image",
    "path": "docs/hero.png"
  },
  "files": [
    "page.json",
    "README.md",
    "tser953rhbt.kicad_sym",
    "tser953rhbt.kicad_mod",
    "tser953rhbt.glb",
    "tser953rhbt.step",
    "tser953rhbt.lbr",
    "docs/hero.png",
    "docs/tser953rhbt-datasheet.pdf",
    "viewers/symbol.html",
    "viewers/footprint.html",
    "tser953rhbt-hero.glb",
    "tser953rhbt-hero.overlay.json",
    "tser953rhbt-etched.glb"
  ],
  "component": {
    "mpn": "TSER953RHBT",
    "manufacturer": "Texas Instruments",
    "package": "VQFN-32(5x5)",
    "pin_count": 33,
    "category": "Interface ICs",
    "subcategory": "Serializers / Deserializers",
    "datasheet": "https://www.ti.com/lit/ds/symlink/tser953rhbt.pdf",
    "parts": {
      "symbol": "tser953rhbt.kicad_sym",
      "footprint": "tser953rhbt.kicad_mod",
      "model_3d": "tser953rhbt-hero.glb",
      "model_3d_plain": "tser953rhbt-etched.glb",
      "model_3d_step": "tser953rhbt-etched.step",
      "model_3d_step_plain": "tser953rhbt.step",
      "lbr": "tser953rhbt.lbr"
    },
    "distributor_links": {
      "lcsc": "C3189310",
      "digikey": "296-TSER953RHBTTR-ND",
      "mouser": "595-TSER953RHBT"
    },
    "distributor_check": {
      "checked_at": "2026-10-30T16:11:00Z",
      "source": "Component Ocean /api/assign-pns",
      "digikey": {
        "pn": "296-TSER953RHBTTR-ND",
        "status": "found",
        "lifecycle": "Active"
      },
      "mouser": {
        "pn": "595-TSER953RHBT",
        "status": "found"
      }
    },
    "pins": [
      {
        "number": "1",
        "name": "CSI_D1P",
        "type": "input",
        "description": "DPHY CSI-2 data input pin; connect to a CSI-2 data source with matched 100-Ω (±5%) impedance interconnects, and it may be left floating if unused."
      },
      {
        "number": "2",
        "name": "CSI_D1N",
        "type": "input",
        "description": "DPHY CSI-2 data input pin; connect to a CSI-2 data source with matched 100-Ω (±5%) impedance interconnects, and it may be left floating if unused."
      },
      {
        "number": "3",
        "name": "CSI_D0P",
        "type": "input",
        "description": "DPHY CSI-2 data input pin; connect to a CSI-2 data source with matched 100-Ω (±5%) impedance interconnects, and it may be left floating if unused."
      },
      {
        "number": "4",
        "name": "CSI_D0N",
        "type": "input",
        "description": "DPHY CSI-2 data input pin; connect to a CSI-2 data source with matched 100-Ω (±5%) impedance interconnects, and it may be left floating if unused."
      },
      {
        "number": "5",
        "name": "CSI_CLKP",
        "type": "input",
        "description": "DPHY CSI-2 clock input pin; connect to a CSI-2 clock source with matched 100-Ω (±5%) impedance interconnects."
      },
      {
        "number": "6",
        "name": "CSI_CLKN",
        "type": "input",
        "description": "DPHY CSI-2 clock input pin; connect to a CSI-2 clock source with matched 100-Ω (±5%) impedance interconnects."
      },
      {
        "number": "7",
        "name": "RES0",
        "type": "input",
        "description": "Reserved pin that must be connected to GND."
      },
      {
        "number": "8",
        "name": "PDB",
        "type": "input",
        "description": "Power-down inverted input with internal 1-MΩ pulldown; 1.8 V enables the device and 0 powers it down, and the input is not 3.3-V tolerant."
      },
      {
        "number": "9",
        "name": "LPF1",
        "type": "passive",
        "description": "Loop filter 1 pin; connect as described in Section 8.2.2.4."
      },
      {
        "number": "10",
        "name": "VDDPLL_CAP",
        "type": "power_out",
        "description": "Connection for an internal analog regulator decoupling capacitor, typically 10-µF, 0.1-µF and 0.01-µF to GND; do not connect to an external supply rail."
      },
      {
        "number": "11",
        "name": "VDDPLL",
        "type": "power_in",
        "description": "1.8-V (±5%) analog power supply pin for the PLL, typically decoupled with 1-µF and 0.01-µF capacitors to GND."
      },
      {
        "number": "12",
        "name": "LPF2",
        "type": "passive",
        "description": "Loop filter 2 pin; connect as described in Section 8.2.2.4."
      },
      {
        "number": "13",
        "name": "DOUT-",
        "type": "bidirectional",
        "description": "V3Link differential input/output pin that must be AC-coupled; see Table 8-3 for recommended capacitor values."
      },
      {
        "number": "14",
        "name": "DOUT+",
        "type": "bidirectional",
        "description": "V3Link differential input/output pin that must be AC-coupled; see Table 8-3 for recommended capacitor values."
      },
      {
        "number": "15",
        "name": "VDDDRV_CAP",
        "type": "power_out",
        "description": "Connection for an internal analog regulator decoupling capacitor, typically 10-µF, 0.1-µF and 0.01-µF to GND; do not connect to an external supply rail."
      },
      {
        "number": "16",
        "name": "VDDDRV",
        "type": "power_in",
        "description": "1.8-V (±5%) analog power supply pin, typically decoupled with 1-µF and 0.01-µF capacitors to GND."
      },
      {
        "number": "17",
        "name": "GPIO_0",
        "type": "bidirectional",
        "description": "General-purpose input/output pin with a 300-kΩ (typical) internal pulldown at power-up; can sense its input voltage, and TI recommends setting GPIOx_INPUT_EN to 0 if unused."
      },
      {
        "number": "18",
        "name": "GPIO_1",
        "type": "bidirectional",
        "description": "General-purpose input/output pin with a 300-kΩ (typical) internal pulldown at power-up; TI recommends setting GPIOx_INPUT_EN to 0 if unused."
      },
      {
        "number": "19",
        "name": "CLK_OUT/IDX",
        "type": "bidirectional",
        "description": "Strap input that sets the I2C pullup voltage and device address (via a voltage divider to VDD and GND), and becomes CLK_OUT after start-up; minimum resistance on the pin is 35 kΩ if CLK_OUT is used, or it may be tied to GND if unused."
      },
      {
        "number": "20",
        "name": "CLKIN",
        "type": "input",
        "description": "Reference clock input; connect to a local clock source in non-sync external clock mode, and it may be left open in other clocking modes."
      },
      {
        "number": "21",
        "name": "MODE",
        "type": "input",
        "description": "Mode select strap input sampled when PDB transitions LOW to HIGH, typically set with a voltage divider to VDD18 and GND."
      },
      {
        "number": "22",
        "name": "RES1",
        "type": "input",
        "description": "Reserved pin that must not be connected (leave floating)."
      },
      {
        "number": "23",
        "name": "I2C_SDA",
        "type": "bidirectional",
        "description": "Open-drain I2C data pin, typically pulled up by 470-Ω to 4.7-kΩ resistors to either 1.8-V or 3.3-V depending on the IDX setting; open-drain voltage limit is 3.96 V (absolute maximum)."
      },
      {
        "number": "24",
        "name": "I2C_SCL",
        "type": "bidirectional",
        "description": "Open-drain I2C clock pin, typically pulled up by 470-Ω to 4.7-kΩ resistors to either 1.8-V or 3.3-V depending on the IDX setting; open-drain voltage limit is 3.96 V (absolute maximum)."
      },
      {
        "number": "25",
        "name": "VDDD",
        "type": "power_in",
        "description": "1.8-V (±5%) digital power supply pin, typically decoupled with 1-µF and 0.01-µF capacitors to GND."
      },
      {
        "number": "26",
        "name": "VDDD_CAP",
        "type": "power_out",
        "description": "Connection for an internal analog regulator decoupling capacitor, typically 10-µF, 0.1-µF and 0.01-µF to GND; do not connect to an external supply rail."
      },
      {
        "number": "27",
        "name": "GPIO_2",
        "type": "bidirectional",
        "description": "General-purpose input/output pin with a 300-kΩ (typical) internal pulldown at power-up; TI recommends setting GPIOx_INPUT_EN to 0 if unused."
      },
      {
        "number": "28",
        "name": "GPIO_3",
        "type": "bidirectional",
        "description": "General-purpose input/output pin with a 300-kΩ (typical) internal pulldown at power-up; TI recommends setting GPIOx_INPUT_EN to 0 if unused."
      },
      {
        "number": "29",
        "name": "CSI_D3P",
        "type": "input",
        "description": "DPHY CSI-2 data input pin; connect to a CSI-2 data source with matched 100-Ω (±5%) impedance interconnects, and it may be left floating if unused."
      },
      {
        "number": "30",
        "name": "CSI_D3N",
        "type": "input",
        "description": "DPHY CSI-2 data input pin; connect to a CSI-2 data source with matched 100-Ω (±5%) impedance interconnects, and it may be left floating if unused."
      },
      {
        "number": "31",
        "name": "CSI_D2P",
        "type": "input",
        "description": "DPHY CSI-2 data input pin; connect to a CSI-2 data source with matched 100-Ω (±5%) impedance interconnects, and it may be left floating if unused."
      },
      {
        "number": "32",
        "name": "CSI_D2N",
        "type": "input",
        "description": "DPHY CSI-2 data input pin; connect to a CSI-2 data source with matched 100-Ω (±5%) impedance interconnects, and it may be left floating if unused."
      },
      {
        "number": "33",
        "name": "EP",
        "type": "passive",
        "description": "Exposed pad (from the footprint; not named in the datasheet pin table)."
      }
    ],
    "provenance": {
      "extractor": "extract_pins 0.3",
      "factory_chain": {
        "factory": "2.0.0",
        "extractor": "extract_pins 0.3",
        "primary_model": "claude-haiku-5-5",
        "primary_mode": "text",
        "consensus_model": "claude-sonnet-5-5",
        "consensus": "agreed",
        "guards": "pin_guards 0.1: passed",
        "guard_notes": [
          "extractor flagged: The DAP (exposed thermal pad) is not given a numeric pin number in the datasheet; it is listed as 'D; The datasheet types these internal regulator decoupling pins as 'D, P' with no KiCad class. I mapped; Loop filter pins LPF1 and LPF2 are typed 'P' in the datasheet with no KiCad class; mapped to passive",
          "exposed pad 33 added from the footprint",
          "dropped thermal pad ['EP'] absent from footprint"
        ],
        "pages_sent": 15,
        "cost_usd": 0.0957,
        "at": "2026-10-30T16:10:39"
      },
      "datasheet": {
        "url": "https://www.ti.com/lit/ds/symlink/tser953rhbt.pdf",
        "pages": 86,
        "sha256": "a9b8758dc014b9f6",
        "source_tier": "mfr"
      },
      "cad": "KiCad official (CC-BY-SA 4.0)",
      "pins": {
        "total": 33,
        "described": 33,
        "cites_pages": true,
        "refuses_to_fabricate": true
      }
    },
    "viewers": {
      "symbol": "viewers/symbol.html",
      "footprint": "viewers/footprint.html"
    },
    "models_3d": [
      {
        "file": "tser953rhbt.step",
        "role": "plain",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          5.0,
          5.0,
          0.875
        ],
        "zmin_mm": 0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "5fa713ea46b36980895812ed853577889b7cb06d275041a39b99bc0be305dc79",
        "checked": "2026-10-30",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      },
      {
        "file": "tser953rhbt-etched.step",
        "role": "eda",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          5.0,
          5.0,
          0.875
        ],
        "zmin_mm": 0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "5ad95d1877bc4c0eaf6d65a62d401c31dcddf1ceeccaed0b56d631493f4fd9a9",
        "checked": "2026-10-30",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      }
    ],
    "package_dims": {
      "package_code": "RHB0032P",
      "source_page": 83,
      "D": {
        "nom_mm": 5.0,
        "range_mm": [
          4.9,
          5.1
        ]
      },
      "E1": {
        "nom_mm": 5.0,
        "range_mm": [
          4.9,
          5.1
        ]
      },
      "e": {
        "nom_mm": 0.5,
        "range_mm": [
          null,
          null
        ]
      },
      "A": {
        "nom_mm": 1.0,
        "range_mm": [
          null,
          1.0
        ]
      },
      "source": "datasheet package drawing, every number found on its page (extract_pins --task dims)",
      "model_check": {
        "file": "tser953rhbt.step",
        "verdict": "PASS",
        "reasons": [
          "height within the datasheet's package drawing"
        ],
        "by": "factory/package_fit.py"
      }
    }
  }
}