main
Ray tpw4053-sr: component.models_3d pose record per STEP (Z-up, seated z=0, pad-centre origin, identity binding) 48e218c 1d ago
{
  "schema_version": 1,
  "type": "component",
  "slug": "tpw4053-sr",
  "title": "TPW4053-SR",
  "brief": "3PEAK Analog Switches / Multiplexers, SOIC-16. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.",
  "version": "0.2.0",
  "license": "CC-BY-SA-4.0",
  "tags": [
    "component",
    "comm-uart",
    "tpw4053-sr"
  ],
  "component": {
    "mpn": "TPW4053-SR",
    "manufacturer": "3PEAK",
    "package": "SOIC-16",
    "pin_count": 16,
    "category": "Comm/UART",
    "subcategory": "Analog Switches / Multiplexers",
    "datasheet": "https://wmsc.lcsc.com/wmsc/upload/file/pdf/v2/lcsc/2308251123_3PEAK-TPW4053-SR_C7500846.pdf",
    "parts": {
      "symbol": "tpw4053-sr.kicad_sym",
      "footprint": "tpw4053-sr.kicad_mod",
      "model_3d": "tpw4053-sr-etched.glb",
      "model_3d_plain": "tpw4053-sr.glb",
      "model_3d_step": "tpw4053-sr-etched.step",
      "model_3d_step_plain": "tpw4053-sr.step",
      "lbr": "tpw4053-sr.lbr"
    },
    "distributor_links": {
      "lcsc": "C7500846"
    },
    "pins": [
      {
        "number": "1",
        "name": "B1",
        "type": "bidirectional",
        "description": "Channel B1 analog switch throw. Connects to common B (pin 15) when the B-channel select routes to the '1' side. Signal range VEE to VCC; ±25 mA max switch current."
      },
      {
        "number": "2",
        "name": "B0",
        "type": "bidirectional",
        "description": "Channel B0 analog switch throw. Connects to common B (pin 15) when the B-channel select routes to the '0' side. Signal range VEE to VCC; ±25 mA max switch current."
      },
      {
        "number": "3",
        "name": "C1",
        "type": "bidirectional",
        "description": "Channel C1 analog switch throw. Connects to common C (pin 4) when the C-channel select routes to the '1' side. Signal range VEE to VCC; ±25 mA max switch current."
      },
      {
        "number": "4",
        "name": "C",
        "type": "bidirectional",
        "description": "C common analog input/output. Routed to either C0 (pin 5) or C1 (pin 3) depending on the S2 select input and enable. Bidirectional analog signal path."
      },
      {
        "number": "5",
        "name": "C0",
        "type": "bidirectional",
        "description": "Channel C0 analog switch throw. Connects to common C (pin 4) when the C-channel select routes to the '0' side. Signal range VEE to VCC; ±25 mA max switch current."
      },
      {
        "number": "6",
        "name": "/E",
        "type": "input",
        "description": "Active-low enable input. When /E is LOW the selected switches are enabled per the S0/S1/S2 truth table; when /E is HIGH all three switches are turned off. Digital input, VIH = 2.0 V min (2.4 V at 9-11 V VCC), VIL = 0.8 V max. Must be held HIGH or LOW; do not float."
      },
      {
        "number": "7",
        "name": "VEE",
        "type": "power_in",
        "description": "Negative analog supply. Ground for single-supply operation (VEE = 0 V) or negative rail for dual-supply operation (VEE down to −5.5 V). Sets the lower analog signal limit; abs-max −6.5 V to 0.5 V vs GND."
      },
      {
        "number": "8",
        "name": "GND",
        "type": "power_in",
        "description": "Digital ground reference. VCC − GND recommended 3 V to 12 V; VEE − GND recommended −6 V to 0 V."
      },
      {
        "number": "9",
        "name": "S2",
        "type": "input",
        "description": "Select input for the C channel (selects C0 vs C1). Digital CMOS input, VIH = 2.0 V min (2.4 V at 9-11 V VCC), VIL = 0.8 V max; input leakage ±1 µA max. Must be driven HIGH or LOW, not floated."
      },
      {
        "number": "10",
        "name": "S1",
        "type": "input",
        "description": "Select input for the B channel (selects B0 vs B1). Digital CMOS input, VIH = 2.0 V min (2.4 V at 9-11 V VCC), VIL = 0.8 V max; input leakage ±1 µA max. Must be driven HIGH or LOW, not floated."
      },
      {
        "number": "11",
        "name": "S0",
        "type": "input",
        "description": "Select input for the A channel (selects A0 vs A1). Digital CMOS input, VIH = 2.0 V min (2.4 V at 9-11 V VCC), VIL = 0.8 V max; input leakage ±1 µA max. Must be driven HIGH or LOW, not floated."
      },
      {
        "number": "12",
        "name": "A0",
        "type": "bidirectional",
        "description": "Channel A0 analog switch throw. Connects to common A (pin 14) when the A-channel select routes to the '0' side. Signal range VEE to VCC; ±25 mA max switch current."
      },
      {
        "number": "13",
        "name": "A1",
        "type": "bidirectional",
        "description": "Channel A1 analog switch throw. Connects to common A (pin 14) when the A-channel select routes to the '1' side. Signal range VEE to VCC; ±25 mA max switch current."
      },
      {
        "number": "14",
        "name": "A",
        "type": "bidirectional",
        "description": "A common analog input/output. Routed to either A0 (pin 12) or A1 (pin 13) depending on the S0 select input and enable. Bidirectional analog signal path."
      },
      {
        "number": "15",
        "name": "B",
        "type": "bidirectional",
        "description": "B common analog input/output. Routed to either B0 (pin 2) or B1 (pin 1) depending on the S1 select input and enable. Bidirectional analog signal path."
      },
      {
        "number": "16",
        "name": "VCC",
        "type": "power_in",
        "description": "Positive supply. Single-supply 3 V to 12 V above GND, or dual-supply 4.5-5.5 V above GND with VEE at −4.5 to −5.5 V. Sets the upper analog signal limit; abs-max −0.5 V to 13 V vs GND. ICC quiescent 4-16 µA typ over the supply range."
      }
    ],
    "provenance": {
      "extractor": "ds2sf",
      "datasheet": {
        "url": "https://wmsc.lcsc.com/wmsc/upload/file/pdf/v2/lcsc/2308251123_3PEAK-TPW4053-SR_C7500846.pdf",
        "pages": 15,
        "sha256": "cdb913c6bba9a54e",
        "source_tier": "lcsc"
      },
      "cad": "KiCad official (CC-BY-SA 4.0)",
      "pins": {
        "total": 16,
        "described": 16,
        "cites_pages": true,
        "refuses_to_fabricate": true
      }
    },
    "viewers": {
      "symbol": "viewers/symbol.html",
      "footprint": "viewers/footprint.html"
    },
    "pin1": {
      "pad": "1",
      "at": [
        -2.475,
        -4.445
      ],
      "corner": "top-left",
      "source": "silk-marker",
      "derived_from": "SOIC-16_3.9x9.9mm_P1.27mm@sha256:f9b5075740f7816c",
      "mark": "drawn"
    },
    "models_3d": [
      {
        "file": "tpw4053-sr.step",
        "role": "plain",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          6.0,
          9.9,
          1.75
        ],
        "zmin_mm": -0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "d5eeddb4c0b304dc61950919b126fc61d7586abd5f16ab71a2a79759ec6498bf",
        "checked": "2026-10-07",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      },
      {
        "file": "tpw4053-sr-etched.step",
        "role": "eda",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          6.0,
          9.9,
          1.75
        ],
        "zmin_mm": -0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "187f27d53d362a7e666484c5d9d005fb62d47e9231e63696c4dd20d035714771",
        "checked": "2026-10-07",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      }
    ]
  },
  "metadata": {
    "specs": {
      "Manufacturer": "3PEAK",
      "Package": "SOIC-16",
      "Category": "Comm/UART",
      "Pins": "16"
    }
  },
  "sections": [
    "hero",
    "viewers",
    "readme",
    "breadcrumbs",
    "info"
  ],
  "discovery_triggers": [
    "tpw4053-sr"
  ],
  "discovery_pitch": "TPW4053-SR (3PEAK) component page with datasheet-verified CAD.",
  "author": {
    "name": "Ray",
    "email": "[email protected]"
  },
  "dependencies": {},
  "hero": {
    "type": "image",
    "path": "docs/hero.png"
  },
  "files": [
    "page.json",
    "README.md",
    "tpw4053-sr.kicad_sym",
    "tpw4053-sr.kicad_mod",
    "tpw4053-sr.glb",
    "tpw4053-sr.step",
    "tpw4053-sr.lbr",
    "docs/hero.png",
    "docs/tpw4053-sr-datasheet.pdf",
    "viewers/symbol.html",
    "viewers/footprint.html",
    "pads.json",
    "tpw4053-sr-etched.step"
  ],
  "visibility": "public",
  "description": "3PEAK Analog Switches / Multiplexers, SOIC-16. Datasheet-verified pinout, KiCad symbol/footprint/3D.",
  "variants": [
    {
      "mpn": "TPW4053-SR",
      "kind": "packaging"
    },
    {
      "mpn": "TPW4053-SRTR",
      "kind": "packaging"
    },
    {
      "mpn": "TPW4053-SR-TR",
      "kind": "packaging"
    }
  ],
  "updated_at": "2026-09-25T12:55:44.843Z"
}