main
Download ZIP Propose a change
Generated by kicad-footprint-generator · KiCad file format 20260206
Name Last commit message Last updated
docs Publish 0.1.0 · Ray 6d ago
viewers tpv706sl1-sr: viewers · Ray 6d ago
package.json Publish 0.1.0 · Ray 6d ago
page.json Set visibility: public · Ray 6d ago
README.md Publish 0.1.0 · Ray 6d ago
tpv706sl1-sr-etched.glb Publish 0.1.0 · Ray 6d ago
tpv706sl1-sr-etched.step tpv706sl1-sr: factory component page (tier=lcsc) · Ray 6d ago
tpv706sl1-sr-hero.glb tpv706sl1-sr: hero GLB from the etched model (keeps the MPN mark) · Ray 6d ago
tpv706sl1-sr-hero.overlay.json Publish 0.1.0 · Ray 6d ago
tpv706sl1-sr.glb Publish 0.1.0 · Ray 6d ago
tpv706sl1-sr.kicad_mod Publish 0.1.0 · Ray 6d ago
tpv706sl1-sr.kicad_sym Publish 0.1.0 · Ray 6d ago
tpv706sl1-sr.lbr Publish 0.1.0 · Ray 6d ago
tpv706sl1-sr.step Publish 0.1.0 · Ray 6d ago

TPV706SL1-SR

3PEAK · IC · SOP-8

TPV706SL1-SR from 3PEAK, in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 MR input Manual reset input: driving MR low asserts RESET, MR has an internal pull-up current so it reads high when unconnected, and its thresholds are 0.3×VCC (low) and 0.7×VCC (high).
2 VCC power_in Power supply voltage being monitored, with an operating range of 1 V to 5.5 V.
3 GND power_in Ground reference pin that should be connected to the ground reference.
4 PFI input Power-fail input with a 1.25-V falling threshold (1.18 V to 1.32 V); PFO goes low when PFI is below 1.25 V, and PFI should be connected to GND if unused.
5 PFO output Power-fail output that goes low when PFI is below 1.25 V and otherwise stays high, with VOL of 0.4 V max at 1.6 mA sink (VCC ≥ 5 V).
6 WDI input Watchdog input whose logic transitions clear the watchdog timer; if the pin stays low or high for the watchdog timeout (1.6 s typ, 1 s to 2.4 s) WDO goes low, and floating WDI disables the watchdog function.
7 RESET output Active-low push-pull reset output that is asserted when VCC is below the reset threshold or MR is low, stays low for 200 ms (typ) after VCC rises above the threshold or MR returns high, and is guaranteed low down to VCC = 1 V.
8 WDO output Watchdog output that pulls low on a watchdog timeout and stays low while VCC is below the reset threshold, returning high with no delay once VCC rises above the threshold.

Key specifications

Parameter Value
Manufacturer 3PEAK
Package SOP-8
Category
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
VCC Power Supply VCC -0.3 6 V 5
Output Current 20 mA 5
TJ Maximum Junction Temperature TJ 150 °C 5
TA Operating Temperature Range TA -40 125 °C 5
TSTG Storage Temperature Range TSTG -65 150 °C 5
TL Lead Temperature (Soldering 10 sec) TL 260 °C Soldering 10 sec 5
VCC Operating Supply Voltage VCC 1 5.5 V 6
ICC Supply Current ICC 4 15 μA WDI and MR unconnected (VCC = 1.8 V) 6
ICC Supply Current ICC 6 20 μA WDI and MR unconnected (VCC = 5 V) 6
VTH Reset Threshold Voltage (variant TPV706S) VTH 2.82 2.93 3 V TPV706S 6
tRP Reset Timeout Period tRP 140 200 280 ms 6
Reset Output Voltage Low (Push-Pull) VOL 0.3 V VCC ≥ 1 V, ISINK = 50 μA 6
Reset Output Voltage Low (Push-Pull) VOL 0.4 V ISINK = 1.2 mA @ Vcc ≥ 2 V 6
MR Input Pulse Width tPW_MR 6 μs 6
WDI Pulse Width tPW_WD 50 ns 7
Watchdog Timeout Period tWD 1 1.6 2.4 sec 6
MR to Reset Delay td_MR 1 6 μs 6
WDO VOL VOL_WDO 0.4 V ISINK = 1.2 mA @ VCC ≥ 5 V 7
Power fail input threshold VTH_PFI 1.18 1.25 1.32 V PFI falling 7
PFO VOL VOL_PFO 0.4 V ISINK = 1.6 mA @ VCC ≥ 5 V 7
Package Thermal Resistance Junction-to-Ambient θJA 143 °C/W SOP8 5
Package Thermal Resistance Junction-to-Case θJC 60 °C/W SOP8 5
Reset Threshold Temperature Coefficient 80 ppm/°C 6
VHYS Reset Threshold Hysteresis VHYS 1000 mV 2× VTH 6
VCC to Reset Delay tRD 20 μs 6
MR Glitch Rejection tGR_MR 100 ns 6
MR Pull-up Current IMR_V0 80 μA VCC = 3V 6
WDI input current IWDI 20 μA VWDI = VCC 7
WDI input current IWDI -15 μA VWDI = 0 7

CAD (KiCad official)

  • Symbol: TPV706SL1-SR
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOP-8 (KiCad packages3D, STEP)
  • 3D model files: tpv706sl1-sr-etched.step / tpv706sl1-sr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tpv706sl1-sr.step / tpv706sl1-sr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: 3PEAK datasheet (16 pp, sha256 7504206ccaf42b7c, retrieved 2026-10-17, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF