component
TPS79425DGNR
Public Made by Adomby adom
Texas Instruments Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, MSOP-8-EP. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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TPS79425DGNR
Texas Instruments · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · MSOP-8-EP
TPS79425DGNR from Texas Instruments, in a MSOP-8-EP. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | OUT | power_out | Regulator output, delivering 0 to 250 mA continuous, with a 1.0 µF minimum (2.2 µF typical) output capacitor to GND required for stability. |
| 2 | NC | unconnected | Not internally connected; connect to GND for better thermal performance or leave floating. |
| 3 | FB | input | Feedback input for the adjustable version only; the internal reference is 1.225 V (1.201 V to 1.25 V). |
| 4 | NR/NC | input | Noise-reduction pin on the old chip only, where an external capacitor of up to 100 nF filters the bandgap noise; no connection on the new chip, which may be tied to GND or left floating. |
| 5 | GND | power_in | Regulator ground, to which the bypass capacitor grounds must connect directly. |
| 6 | EN | input | Enable input, active high: logic high (≥1.7 V on the old chip) enables the device and logic low (≤0.7 V) puts it in shutdown, with an absolute range of 0 to 5.5 V. |
| 7 | NC | unconnected | Not internally connected; connect to GND for better thermal performance or leave floating. |
| 8 | IN | power_in | Unregulated input supply, specified from 2.7 V to 5.5 V, requiring a 1 µF or larger ceramic input capacitor to GND placed close to the device. |
| 9 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | MSOP-8-EP |
| Category | Power Management (PMIC) |
| Pins | 9 |
CAD (KiCad official)
- Symbol:
TPS79425DGNR - Footprint:
Package_SO:MSOP-8-1EP_3x3mm_P0.65mm_EP1.5x1.8mm - 3D model: MSOP-8-EP (KiCad packages3D, STEP)
- 3D model files:
tps79425dgnr-etched.step/tps79425dgnr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);tps79425dgnr.step/tps79425dgnr.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (51 pp, sha256
84291eb77a7c37c6, retrieved 2026-10-08, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# TPS79425DGNR
**Texas Instruments** · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · MSOP-8-EP
TPS79425DGNR from Texas Instruments, in a MSOP-8-EP. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | OUT | power_out | Regulator output, delivering 0 to 250 mA continuous, with a 1.0 µF minimum (2.2 µF typical) output capacitor to GND required for stability. |
| 2 | NC | unconnected | Not internally connected; connect to GND for better thermal performance or leave floating. |
| 3 | FB | input | Feedback input for the adjustable version only; the internal reference is 1.225 V (1.201 V to 1.25 V). |
| 4 | NR/NC | input | Noise-reduction pin on the old chip only, where an external capacitor of up to 100 nF filters the bandgap noise; no connection on the new chip, which may be tied to GND or left floating. |
| 5 | GND | power_in | Regulator ground, to which the bypass capacitor grounds must connect directly. |
| 6 | EN | input | Enable input, active high: logic high (≥1.7 V on the old chip) enables the device and logic low (≤0.7 V) puts it in shutdown, with an absolute range of 0 to 5.5 V. |
| 7 | NC | unconnected | Not internally connected; connect to GND for better thermal performance or leave floating. |
| 8 | IN | power_in | Unregulated input supply, specified from 2.7 V to 5.5 V, requiring a 1 µF or larger ceramic input capacitor to GND placed close to the device. |
| 9 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | MSOP-8-EP |
| Category | Power Management (PMIC) |
| Pins | 9 |
## CAD (KiCad official)
- Symbol: `TPS79425DGNR`
- Footprint: `Package_SO:MSOP-8-1EP_3x3mm_P0.65mm_EP1.5x1.8mm`
- 3D model: MSOP-8-EP (KiCad packages3D, STEP)
- 3D model files: `tps79425dgnr-etched.step` / `tps79425dgnr-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `tps79425dgnr.step` / `tps79425dgnr.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/tps794) (51 pp, sha256 `84291eb77a7c37c6`, retrieved 2026-10-08, tier: lcsc)
- **Datasheet language:** Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/tps79425dgnr-datasheet.pdf)