component
TPS79425DGNR
Public Made by Adomby adom
Texas Instruments Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, MSOP-8-EP. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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README.mdadded+46@@ -0,0 +1,46 @@+# TPS79425DGNR++**Texas Instruments** · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · MSOP-8-EP++TPS79425DGNR from Texas Instruments, in a MSOP-8-EP. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | OUT | power_out | Regulator output, delivering 0 to 250 mA continuous, with a 1.0 µF minimum (2.2 µF typical) output capacitor to GND required for stability. |+| 2 | NC | unconnected | Not internally connected; connect to GND for better thermal performance or leave floating. |+| 3 | FB | input | Feedback input for the adjustable version only; the internal reference is 1.225 V (1.201 V to 1.25 V). |+| 4 | NR/NC | input | Noise-reduction pin on the old chip only, where an external capacitor of up to 100 nF filters the bandgap noise; no connection on the new chip, which may be tied to GND or left floating. |+| 5 | GND | power_in | Regulator ground, to which the bypass capacitor grounds must connect directly. |+| 6 | EN | input | Enable input, active high: logic high (≥1.7 V on the old chip) enables the device and logic low (≤0.7 V) puts it in shutdown, with an absolute range of 0 to 5.5 V. |+| 7 | NC | unconnected | Not internally connected; connect to GND for better thermal performance or leave floating. |+| 8 | IN | power_in | Unregulated input supply, specified from 2.7 V to 5.5 V, requiring a 1 µF or larger ceramic input capacitor to GND placed close to the device. |+| 9 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | Texas Instruments |+| Package | MSOP-8-EP |+| Category | Power Management (PMIC) |+| Pins | 9 |++## CAD (KiCad official)++- Symbol: `TPS79425DGNR`+- Footprint: `Package_SO:MSOP-8-1EP_3x3mm_P0.65mm_EP1.5x1.8mm`+- 3D model: MSOP-8-EP (KiCad packages3D, STEP)+- 3D model files: `tps79425dgnr-etched.step` / `tps79425dgnr-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `tps79425dgnr.step` / `tps79425dgnr.glb` are the bare package body.++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/tps794) (51 pp, sha256 `84291eb77a7c37c6`, retrieved 2026-10-08, tier: lcsc)+- **Datasheet language:** Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.+- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/tps79425dgnr-datasheet.pdf)
page.jsonadded+207@@ -0,0 +1,207 @@+{+ "slug": "tps79425dgnr",+ "version": "0.1.0",+ "type": "component",+ "description": "Texas Instruments Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, MSOP-8-EP. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",+ "tags": [+ "component",+ "power management (pmic)",+ "tps79425dgnr",+ "factory-2.0.0",+ "extractor-text"+ ],+ "dependencies": {},+ "hero": {+ "type": "image",+ "path": "docs/hero.png"+ },+ "files": [+ "page.json",+ "README.md",+ "tps79425dgnr.kicad_sym",+ "tps79425dgnr.kicad_mod",+ "tps79425dgnr.glb",+ "tps79425dgnr.step",+ "tps79425dgnr.lbr",+ "docs/hero.png",+ "docs/tps79425dgnr-datasheet.pdf",+ "viewers/symbol.html",+ "viewers/footprint.html",+ "tps79425dgnr-hero.glb",+ "tps79425dgnr-hero.overlay.json"+ ],+ "component": {+ "mpn": "TPS79425DGNR",+ "manufacturer": "Texas Instruments",+ "package": "MSOP-8-EP",+ "pin_count": 9,+ "category": "Power Management (PMIC)",+ "subcategory": "Voltage Regulators - Linear, Low Drop Out (LDO) Regulators",+ "datasheet": "https://www.ti.com/cn/lit/gpn/tps794",+ "parts": {+ "symbol": "tps79425dgnr.kicad_sym",+ "footprint": "tps79425dgnr.kicad_mod",+ "model_3d": "tps79425dgnr-hero.glb",+ "model_3d_plain": "tps79425dgnr.glb",+ "model_3d_step": "tps79425dgnr-etched.step",+ "model_3d_step_plain": "tps79425dgnr.step",+ "lbr": "tps79425dgnr.lbr"+ },+ "distributor_links": {+ "lcsc": "C2861578",+ "digikey": "296-13527-2-ND",+ "mouser": "595-TPS79425DGNR"+ },+ "distributor_check": {+ "checked_at": "2026-10-08T16:20:55Z",+ "source": "Component Ocean /api/assign-pns",+ "digikey": {+ "pn": "296-13527-2-ND",+ "status": "found",+ "lifecycle": "Active"+ },+ "mouser": {+ "pn": "595-TPS79425DGNR",+ "status": "found"+ }+ },+ "pins": [+ {+ "number": "1",+ "name": "OUT",+ "type": "power_out",+ "description": "Regulator output, delivering 0 to 250 mA continuous, with a 1.0 µF minimum (2.2 µF typical) output capacitor to GND required for stability."+ },+ {+ "number": "2",+ "name": "NC",+ "type": "unconnected",+ "description": "Not internally connected; connect to GND for better thermal performance or leave floating."+ },+ {+ "number": "3",+ "name": "FB",+ "type": "input",+ "description": "Feedback input for the adjustable version only; the internal reference is 1.225 V (1.201 V to 1.25 V)."+ },+ {+ "number": "4",+ "name": "NR/NC",+ "type": "input",+ "description": "Noise-reduction pin on the old chip only, where an external capacitor of up to 100 nF filters the bandgap noise; no connection on the new chip, which may be tied to GND or left floating."+ },+ {+ "number": "5",+ "name": "GND",+ "type": "power_in",+ "description": "Regulator ground, to which the bypass capacitor grounds must connect directly."+ },+ {+ "number": "6",+ "name": "EN",+ "type": "input",+ "description": "Enable input, active high: logic high (≥1.7 V on the old chip) enables the device and logic low (≤0.7 V) puts it in shutdown, with an absolute range of 0 to 5.5 V."+ },+ {+ "number": "7",+ "name": "NC",+ "type": "unconnected",+ "description": "Not internally connected; connect to GND for better thermal performance or leave floating."+ },+ {+ "number": "8",+ "name": "IN",+ "type": "power_in",+ "description": "Unregulated input supply, specified from 2.7 V to 5.5 V, requiring a 1 µF or larger ceramic input capacitor to GND placed close to the device."+ },+ {+ "number": "9",+ "name": "EP",+ "type": "passive",+ "description": "Exposed pad (from the footprint; not named in the datasheet pin table)."+ }+ ],+ "provenance": {+ "extractor": "extract_pins 0.3",+ "factory_chain": {+ "factory": "2.0.0",+ "extractor": "extract_pins 0.3",+ "primary_model": "claude-haiku-5-5",+ "primary_mode": "text",+ "consensus_model": "claude-sonnet-5-5",+ "consensus": "agreed",+ "guards": "pin_guards 0.1: passed",+ "guard_notes": [+ "extractor flagged: The thermal PowerPAD is listed in the pin table as 'GND 5，PAD 3、6', which is garbled and conflicts w; Pin 3 is FB for the adjustable version. The MPN TPS79425 is a fixed 2.5 V part, and the figure label; Pin 4 is NR (noise reduction) on the old chip and NC on the new chip. The datasheet does not say whi",+ "exposed pad 9 added from the footprint"+ ],+ "pages_sent": 24,+ "cost_usd": 0.1153,+ "at": "2026-10-08T16:20:28"+ },+ "datasheet": {+ "url": "https://www.ti.com/cn/lit/gpn/tps794",+ "pages": 51,+ "sha256": "84291eb77a7c37c6",+ "source_tier": "lcsc"+ },+ "cad": "KiCad official (CC-BY-SA 4.0)",+ "pins": {+ "total": 9,+ "described": 9,+ "cites_pages": true,+ "refuses_to_fabricate": true+ }+ },+ "viewers": {+ "symbol": "viewers/symbol.html",+ "footprint": "viewers/footprint.html"+ },+ "models_3d": [+ {+ "file": "tps79425dgnr.step",+ "role": "plain",+ "up": "Z",+ "units": "mm",+ "origin": "footprint origin = pad-pattern centre",+ "seat": "z = 0",+ "extents_mm": [+ 4.9,+ 3,+ 0.96+ ],+ "zmin_mm": 0,+ "centre_offset_mm": 0,+ "footprint_binding": "identity",+ "sha256": "43252be3beac8fd30ca9bfeb82a613fa01d5dffff9b22810c13a4655daafb5ee",+ "checked": "2026-10-08",+ "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+ },+ {+ "file": "tps79425dgnr-etched.step",+ "role": "eda",+ "up": "Z",+ "units": "mm",+ "origin": "footprint origin = pad-pattern centre",+ "seat": "z = 0",+ "extents_mm": [+ 4.9,+ 3,+ 0.96+ ],+ "zmin_mm": 0,+ "centre_offset_mm": 0,+ "footprint_binding": "identity",+ "sha256": "1ce2ba7be93e1cddabfd21c44d82bc41b52c0b63fd3fa4640dcf214f1a94ea21",+ "checked": "2026-10-08",+ "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+ }+ ]+ },+ "visibility": "public",+ "org": "adom",+ "author": {+ "name": "Ray",+ "email": "[email protected]"+ }+}