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TPS79418DGNR
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Texas Instruments Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, MSOP-8-EP. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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tps79418dgnr: specified limits as data (metadata.characteristics, 41 rows from the datasheet)
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TPS79418DGNR
Texas Instruments · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · MSOP-8-EP
TPS79418DGNR from Texas Instruments, in a MSOP-8-EP. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | OUT | output | Regulator output, which requires an output capacitor of at least 1.0 µF (2.2 µF recommended) from OUT to GND. |
| 2 | NC | unconnected | Not internally connected; the datasheet says to connect it to GND for better thermal performance or leave it floating. |
| 3 | FB/NC | input | Feedback input for the adjustable version (VREF 1.225 V); on the fixed-voltage TPS79418 the datasheet labels this pin FB/NC and gives no separate termination requirement. |
| 4 | NR/NC | input | Noise-reduction pin on the legacy die only, where an external capacitor (recommended 0 to 100 nF) filters bandgap noise; on the new die it is a no-connect that may be tied to GND or left floating. |
| 5 | GND | power_in | Regulator ground; the datasheet directs the input and output capacitor grounds to connect directly to this pin. |
| 6 | EN | input | Active-high enable input: the device turns on above VEN(HI) and enters shutdown below VEN(LOW), with VEN rated 0 to 5.5 V; tie to IN if shutdown is not needed. |
| 7 | NC | unconnected | Not internally connected; the datasheet says to connect it to GND for better thermal performance or leave it floating. |
| 8 | IN | input | Unregulated input supply, operating from 2.7 V to 5.5 V, with an input capacitor of at least 1 µF from IN to GND placed close to the device. |
| 9 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | MSOP-8-EP |
| Category | Power Management (PMIC) |
| Pins | 9 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| 输入电压范围 (VIN input voltage range) | VIN | 2.7 | 5.5 | V | 5 | ||
| 持续输出电流 (continuous output current) | IOUT | 0 | 250 | mA | 5 | ||
| 固定 VOUT 精度 (fixed output voltage accuracy, TPS79418) | -3 | 3 | % | 0µA < IOUT < 250mA，VOUT+1V ≤ VIN ≤ 5.5V | 5 | ||
| 静态电流 GND current (旧芯片, old die) | IGND | 170 | 220 | µA | 0µA ≤ IO ≤ 250mA（旧芯片） | 6 | |
| 静态电流 GND current (新芯片, new die) | IGND | 250 | 1000 | µA | 0µA ≤ IO ≤ 250mA（新芯片） | 6 | |
| 线路调整率 line regulation | ΔVOUT/ΔVIN | 0.05 | 0.12 | %/V | VOUT + 1V ≤ VIN ≤ 5.5V | 6 | |
| 输出电流限制 output current limit (新芯片, new die) | ICL | 320 | 460 | mA | VIN = VOUT(NOM) + 1V，VOUT = 0.9 x VOUT(NOM)（仅限新芯片） | 6 | |
| 低电平使能输入电压 EN low (旧芯片, old die) | VEN(LOW) | 0 | 0.7 | V | 2.7V ≤ VIN ≤ 5.5V | 6 | |
| 低电平使能输入电压 EN low (新芯片, new die) | VEN(LOW) | 0 | 0.425 | V | 2.7V ≤ VIN ≤ 5.5V（新芯片） | 6 | |
| 关断电流 shutdown current (旧芯片, old die) | ISHDN | 0.07 | 1 | µA | VEN = 0V，2.7V < VIN < 5.5V（旧芯片） | 6 | |
| 关断电流 shutdown current (新芯片, new die) | ISHDN | 0.01 | 1 | µA | VEN = 0V，2.7V < VIN < 5.5V（新芯片） | 6 | |
| 使能引脚电流 EN pin current | IEN | -1 | 1 | µA | VEN = 0V | 6 | |
| UVLO 阈值 VIN rising (旧芯片, old die) | VUVLO | 2.25 | 2.65 | V | VIN 上升（旧芯片） | 7 | |
| UVLO 阈值 VIN rising (新芯片, new die) | VUVLO | 1.32 | 1.6 | V | VIN 上升（新芯片） | 7 | |
| 输入电压 VIN | VIN | 2.7 | 5.5 | V | 5 | ||
| 启用电压 VEN | VEN | 0 | 5.5 | V | 5 | ||
| 输出电压 VOUT (max) | VOUT | 5 | V | 5 | |||
| 输出电流 IOUT | IOUT | 0 | 250 | mA | 5 | ||
| 输出电容器 COUT | COUT | 1 | 2.2 | µF | 5 | ||
| 降噪电容器 CNR (仅限旧芯片, old die only) | CNR | 0 | 10 | 100 | nF | 仅限旧芯片 | 5 |
| 前馈电容器 CFF (新芯片, new die) | CFF | 10 | 100 | nF | 新芯片 | 5 | |
| 工作结温 operating junction temperature TJ | TJ | -40 | 125 | °C | 5 | ||
| VIN, VEN, VOUT 绝对最大值 (旧芯片, old die) | VIN, VEN, VOUT | -0.3 | 6 | V | 旧芯片 | 4 | |
| VIN, VEN 绝对最大值 (新芯片, new die) | VIN, VEN | -0.3 | 6.5 | V | 新芯片 | 4 | |
| VOUT 绝对最大值 (新芯片, new die) | VOUT | -0.3 | V | 新芯片 | 4 | ||
| 工作结温 operating junction temperature (absolute) | TJ | -40 | 150 | °C | 4 | ||
| 贮存温度 storage temperature | Tstg | -65 | 150 | °C | 4 | ||
| 静电放电 HBM ESD | V(ESD) | -2000 | 2000 | V | 人体放电模型 (HBM), ANSI/ESDA/JEDEC JS-001, 所有引脚 | 4 | |
| 静电放电 CDM ESD | V(ESD) | -500 | 500 | V | 充电器件模型 (CDM), JESD22-C101, 所有引脚 | 4 | |
| 结至环境热阻 RθJA (旧芯片, old die) | RθJA | 63.6 | °C/W | DGN (MSOP-8), 旧芯片 | 5 | ||
| 结至环境热阻 RθJA (新芯片, new die) | RθJA | 51.9 | °C/W | DGN (MSOP-8), 新芯片 | 5 | ||
| 结至外壳（顶部）热阻 RθJC(top) (旧芯片) | RθJC(top) | 87.1 | °C/W | DGN (MSOP-8), 旧芯片 | 5 | ||
| 结至外壳（顶部）热阻 RθJC(top) (新芯片) | RθJC(top) | 82.8 | °C/W | DGN (MSOP-8), 新芯片 | 5 | ||
| 结至电路板热阻 RθJB (旧芯片) | RθJB | 35.2 | °C/W | DGN (MSOP-8), 旧芯片 | 5 | ||
| 结至电路板热阻 RθJB (新芯片) | RθJB | 25.3 | °C/W | DGN (MSOP-8), 新芯片 | 5 | ||
| 结至顶部特征参数 ψJT (旧芯片) | ψJT | 6.8 | °C/W | DGN (MSOP-8), 旧芯片 | 5 | ||
| 结至顶部特征参数 ψJT (新芯片) | ψJT | 6 | °C/W | DGN (MSOP-8), 新芯片 | 5 | ||
| 结至电路板特征参数 ψJB (旧芯片) | ψJB | 35.2 | °C/W | DGN (MSOP-8), 旧芯片 | 5 | ||
| 结至电路板特征参数 ψJB (新芯片) | ψJB | 25.3 | °C/W | DGN (MSOP-8), 新芯片 | 5 | ||
| 结至外壳（底部）热阻 RθJC(bot) (旧芯片) | RθJC(bot) | 21.2 | °C/W | DGN (MSOP-8), 旧芯片 | 5 | ||
| 结至外壳（底部）热阻 RθJC(bot) (新芯片) | RθJC(bot) | 7.6 | °C/W | DGN (MSOP-8), 新芯片 | 5 |
CAD (KiCad official)
- Symbol:
TPS79418DGNR - Footprint:
Package_SO:MSOP-8-1EP_3x3mm_P0.65mm_EP1.5x1.8mm - 3D model: MSOP-8-EP (KiCad packages3D, STEP)
- 3D model files:
tps79418dgnr-etched.step/tps79418dgnr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);tps79418dgnr.step/tps79418dgnr.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (51 pp, sha256
84291eb77a7c37c6, retrieved 2026-10-11, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# TPS79418DGNR
**Texas Instruments** · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · MSOP-8-EP
TPS79418DGNR from Texas Instruments, in a MSOP-8-EP. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | OUT | output | Regulator output, which requires an output capacitor of at least 1.0 µF (2.2 µF recommended) from OUT to GND. |
| 2 | NC | unconnected | Not internally connected; the datasheet says to connect it to GND for better thermal performance or leave it floating. |
| 3 | FB/NC | input | Feedback input for the adjustable version (VREF 1.225 V); on the fixed-voltage TPS79418 the datasheet labels this pin FB/NC and gives no separate termination requirement. |
| 4 | NR/NC | input | Noise-reduction pin on the legacy die only, where an external capacitor (recommended 0 to 100 nF) filters bandgap noise; on the new die it is a no-connect that may be tied to GND or left floating. |
| 5 | GND | power_in | Regulator ground; the datasheet directs the input and output capacitor grounds to connect directly to this pin. |
| 6 | EN | input | Active-high enable input: the device turns on above VEN(HI) and enters shutdown below VEN(LOW), with VEN rated 0 to 5.5 V; tie to IN if shutdown is not needed. |
| 7 | NC | unconnected | Not internally connected; the datasheet says to connect it to GND for better thermal performance or leave it floating. |
| 8 | IN | input | Unregulated input supply, operating from 2.7 V to 5.5 V, with an input capacitor of at least 1 µF from IN to GND placed close to the device. |
| 9 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | MSOP-8-EP |
| Category | Power Management (PMIC) |
| Pins | 9 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| 输入电压范围 (VIN input voltage range) | VIN | 2.7 | | 5.5 | V | | 5 |
| 持续输出电流 (continuous output current) | IOUT | 0 | | 250 | mA | | 5 |
| 固定 VOUT 精度 (fixed output voltage accuracy, TPS79418) | | -3 | | 3 | % | 0µA < IOUT < 250mA，VOUT+1V ≤ VIN ≤ 5.5V | 5 |
| 静态电流 GND current (旧芯片, old die) | IGND | | 170 | 220 | µA | 0µA ≤ IO ≤ 250mA（旧芯片） | 6 |
| 静态电流 GND current (新芯片, new die) | IGND | | 250 | 1000 | µA | 0µA ≤ IO ≤ 250mA（新芯片） | 6 |
| 线路调整率 line regulation | ΔVOUT/ΔVIN | | 0.05 | 0.12 | %/V | VOUT + 1V ≤ VIN ≤ 5.5V | 6 |
| 输出电流限制 output current limit (新芯片, new die) | ICL | | 320 | 460 | mA | VIN = VOUT(NOM) + 1V，VOUT = 0.9 x VOUT(NOM)（仅限新芯片） | 6 |
| 低电平使能输入电压 EN low (旧芯片, old die) | VEN(LOW) | 0 | | 0.7 | V | 2.7V ≤ VIN ≤ 5.5V | 6 |
| 低电平使能输入电压 EN low (新芯片, new die) | VEN(LOW) | 0 | | 0.425 | V | 2.7V ≤ VIN ≤ 5.5V（新芯片） | 6 |
| 关断电流 shutdown current (旧芯片, old die) | ISHDN | | 0.07 | 1 | µA | VEN = 0V，2.7V < VIN < 5.5V（旧芯片） | 6 |
| 关断电流 shutdown current (新芯片, new die) | ISHDN | | 0.01 | 1 | µA | VEN = 0V，2.7V < VIN < 5.5V（新芯片） | 6 |
| 使能引脚电流 EN pin current | IEN | -1 | | 1 | µA | VEN = 0V | 6 |
| UVLO 阈值 VIN rising (旧芯片, old die) | VUVLO | | 2.25 | 2.65 | V | VIN 上升（旧芯片） | 7 |
| UVLO 阈值 VIN rising (新芯片, new die) | VUVLO | | 1.32 | 1.6 | V | VIN 上升（新芯片） | 7 |
| 输入电压 VIN | VIN | 2.7 | | 5.5 | V | | 5 |
| 启用电压 VEN | VEN | 0 | | 5.5 | V | | 5 |
| 输出电压 VOUT (max) | VOUT | | | 5 | V | | 5 |
| 输出电流 IOUT | IOUT | 0 | | 250 | mA | | 5 |
| 输出电容器 COUT | COUT | 1 | 2.2 | | µF | | 5 |
| 降噪电容器 CNR (仅限旧芯片, old die only) | CNR | 0 | 10 | 100 | nF | 仅限旧芯片 | 5 |
| 前馈电容器 CFF (新芯片, new die) | CFF | 10 | | 100 | nF | 新芯片 | 5 |
| 工作结温 operating junction temperature TJ | TJ | -40 | | 125 | °C | | 5 |
| VIN, VEN, VOUT 绝对最大值 (旧芯片, old die) | VIN, VEN, VOUT | -0.3 | | 6 | V | 旧芯片 | 4 |
| VIN, VEN 绝对最大值 (新芯片, new die) | VIN, VEN | -0.3 | | 6.5 | V | 新芯片 | 4 |
| VOUT 绝对最大值 (新芯片, new die) | VOUT | -0.3 | | | V | 新芯片 | 4 |
| 工作结温 operating junction temperature (absolute) | TJ | -40 | | 150 | °C | | 4 |
| 贮存温度 storage temperature | Tstg | -65 | | 150 | °C | | 4 |
| 静电放电 HBM ESD | V(ESD) | -2000 | | 2000 | V | 人体放电模型 (HBM), ANSI/ESDA/JEDEC JS-001, 所有引脚 | 4 |
| 静电放电 CDM ESD | V(ESD) | -500 | | 500 | V | 充电器件模型 (CDM), JESD22-C101, 所有引脚 | 4 |
| 结至环境热阻 RθJA (旧芯片, old die) | RθJA | | 63.6 | | °C/W | DGN (MSOP-8), 旧芯片 | 5 |
| 结至环境热阻 RθJA (新芯片, new die) | RθJA | | 51.9 | | °C/W | DGN (MSOP-8), 新芯片 | 5 |
| 结至外壳（顶部）热阻 RθJC(top) (旧芯片) | RθJC(top) | | 87.1 | | °C/W | DGN (MSOP-8), 旧芯片 | 5 |
| 结至外壳（顶部）热阻 RθJC(top) (新芯片) | RθJC(top) | | 82.8 | | °C/W | DGN (MSOP-8), 新芯片 | 5 |
| 结至电路板热阻 RθJB (旧芯片) | RθJB | | 35.2 | | °C/W | DGN (MSOP-8), 旧芯片 | 5 |
| 结至电路板热阻 RθJB (新芯片) | RθJB | | 25.3 | | °C/W | DGN (MSOP-8), 新芯片 | 5 |
| 结至顶部特征参数 ψJT (旧芯片) | ψJT | | 6.8 | | °C/W | DGN (MSOP-8), 旧芯片 | 5 |
| 结至顶部特征参数 ψJT (新芯片) | ψJT | | 6 | | °C/W | DGN (MSOP-8), 新芯片 | 5 |
| 结至电路板特征参数 ψJB (旧芯片) | ψJB | | 35.2 | | °C/W | DGN (MSOP-8), 旧芯片 | 5 |
| 结至电路板特征参数 ψJB (新芯片) | ψJB | | 25.3 | | °C/W | DGN (MSOP-8), 新芯片 | 5 |
| 结至外壳（底部）热阻 RθJC(bot) (旧芯片) | RθJC(bot) | | 21.2 | | °C/W | DGN (MSOP-8), 旧芯片 | 5 |
| 结至外壳（底部）热阻 RθJC(bot) (新芯片) | RθJC(bot) | | 7.6 | | °C/W | DGN (MSOP-8), 新芯片 | 5 |
## CAD (KiCad official)
- Symbol: `TPS79418DGNR`
- Footprint: `Package_SO:MSOP-8-1EP_3x3mm_P0.65mm_EP1.5x1.8mm`
- 3D model: MSOP-8-EP (KiCad packages3D, STEP)
- 3D model files: `tps79418dgnr-etched.step` / `tps79418dgnr-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `tps79418dgnr.step` / `tps79418dgnr.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/tps794) (51 pp, sha256 `84291eb77a7c37c6`, retrieved 2026-10-11, tier: lcsc)
- **Datasheet language:** Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/tps79418dgnr-datasheet.pdf)