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TPS77618DR
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Texas Instruments Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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TPS77618DR
Texas Instruments · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · SOIC-8
TPS77618DR from Texas Instruments, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | GND | power_in | Ground pin; the datasheet lists it as the device ground and the PowerPAD/tab should be soldered to the ground plane for heat sinking. |
| 2 | EN | input | Negative-polarity enable input; applying a TTL high shuts the regulator down, and EN should be tied to ground if shutdown is not used, with an absolute maximum of +16.5 V. |
| 3 | IN | power_in | Input voltage pin; the absolute maximum input voltage range is -0.3 V to +13.5 V. |
| 4 | IN | power_in | Input voltage pin (second IN pin, internally connected to pin 3); the absolute maximum input voltage range is -0.3 V to +13.5 V. |
| 5 | OUT | power_out | Regulated output voltage; the output requires a capacitor of at least 10 µF with ESR between 50 mΩ and 1.5 Ω connected between OUT and GND. |
| 6 | OUT | power_out | Regulated output voltage (second OUT pin, internally connected to pin 5); the output requires a capacitor of at least 10 µF with ESR between 50 mΩ and 1.5 Ω connected between OUT and GND. |
| 7 | FB/NC | unconnected | Feedback input for the adjustable version only; on the fixed-voltage version (TPS77618) this pin is not internally connected. |
| 8 | RESET/PG | output | On TPS776xx devices this is an open-drain power-good (PG) output that needs a pullup resistor, with a maximum voltage of 16.5 V. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SOIC-8 |
| Category | Power Management (PMIC) |
| Pins | 8 |
CAD (KiCad official)
- Symbol:
TPS77618DR - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SOIC-8 (KiCad packages3D, STEP)
- 3D model files:
tps77618dr-etched.step/tps77618dr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);tps77618dr.step/tps77618dr.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (36 pp, sha256
8829e2a477a2c896, retrieved 2026-10-08, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# TPS77618DR
**Texas Instruments** · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · SOIC-8
TPS77618DR from Texas Instruments, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | GND | power_in | Ground pin; the datasheet lists it as the device ground and the PowerPAD/tab should be soldered to the ground plane for heat sinking. |
| 2 | EN | input | Negative-polarity enable input; applying a TTL high shuts the regulator down, and EN should be tied to ground if shutdown is not used, with an absolute maximum of +16.5 V. |
| 3 | IN | power_in | Input voltage pin; the absolute maximum input voltage range is -0.3 V to +13.5 V. |
| 4 | IN | power_in | Input voltage pin (second IN pin, internally connected to pin 3); the absolute maximum input voltage range is -0.3 V to +13.5 V. |
| 5 | OUT | power_out | Regulated output voltage; the output requires a capacitor of at least 10 µF with ESR between 50 mΩ and 1.5 Ω connected between OUT and GND. |
| 6 | OUT | power_out | Regulated output voltage (second OUT pin, internally connected to pin 5); the output requires a capacitor of at least 10 µF with ESR between 50 mΩ and 1.5 Ω connected between OUT and GND. |
| 7 | FB/NC | unconnected | Feedback input for the adjustable version only; on the fixed-voltage version (TPS77618) this pin is not internally connected. |
| 8 | RESET/PG | output | On TPS776xx devices this is an open-drain power-good (PG) output that needs a pullup resistor, with a maximum voltage of 16.5 V. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SOIC-8 |
| Category | Power Management (PMIC) |
| Pins | 8 |
## CAD (KiCad official)
- Symbol: `TPS77618DR`
- Footprint: `Package_SO:SOIC-8_3.9x4.9mm_P1.27mm`
- 3D model: SOIC-8 (KiCad packages3D, STEP)
- 3D model files: `tps77618dr-etched.step` / `tps77618dr-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `tps77618dr.step` / `tps77618dr.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/tps776) (36 pp, sha256 `8829e2a477a2c896`, retrieved 2026-10-08, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/tps77618dr-datasheet.pdf)