component

TPS73630DBVT

Public Made by Adom

by adom

Texas Instruments Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, SOT-23-5. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componentpower management (pmic)tps73630dbvtfactory-2.0.0extractor-text
Overview Files Discover Packages Releases Dependencies Issues Breadcrumbs Pull Requests Activity
main
Download ZIP Propose a change
Generated by kicad-footprint-generator · KiCad file format 20260206
Name Last commit message Last updated
docs Publish 0.1.0 · Ray 1mo ago
viewers tps73630dbvt: viewers · Ray 1mo ago
package.json Publish 0.1.0 · Ray 1mo ago
page.json Set visibility: public · Ray 1mo ago
README.md Publish 0.1.0 · Ray 1mo ago
tps73630dbvt-etched.glb tps73630dbvt: factory component page (tier=lcsc) · Ray 1mo ago
tps73630dbvt-etched.step tps73630dbvt: factory component page (tier=lcsc) · Ray 1mo ago
tps73630dbvt-hero.glb tps73630dbvt: hero GLB from the etched model (keeps the MPN mark) · Ray 1mo ago
tps73630dbvt-hero.overlay.json Publish 0.1.0 · Ray 1mo ago
tps73630dbvt.glb Publish 0.1.0 · Ray 1mo ago
tps73630dbvt.kicad_mod Publish 0.1.0 · Ray 1mo ago
tps73630dbvt.kicad_sym Publish 0.1.0 · Ray 1mo ago
tps73630dbvt.lbr Publish 0.1.0 · Ray 1mo ago
tps73630dbvt.step Publish 0.1.0 · Ray 1mo ago

TPS73630DBVT

Texas Instruments · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · SOT-23-5

TPS73630DBVT from Texas Instruments, in a SOT-23-5. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 IN input Input supply pin, specified for 1.7 V to 5.5 V with an absolute maximum of -0.3 V to 6 V, and a low-ESR input capacitor of 0.1 µF to 1 µF is recommended near the regulator.
2 GND power_in Ground pin, which should connect directly to the bypass capacitor grounds and to the PCB ground plane for best AC performance (PSRR, noise, transient response).
3 EN input Active-high enable input compatible with TTL-CMOS levels, where above 1.7 V (min) turns the regulator on and below 0.5 V (max) shuts it down, and it should be tied to IN if shutdown is not used.
4 NR passive Noise-reduction pin for the fixed-voltage version only, where an external capacitor from NR to GND bypasses the internal bandgap noise and reduces output noise (for example, 10 nF gives about 8.5 × VOUT µVRMS versus 27 × VOUT without it).
5 OUT output Regulator output, which is stable without any output capacitor and delivers up to 400 mA over the recommended operating range.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package SOT-23-5
Category Power Management (PMIC)
Pins 5

CAD (KiCad official)

  • Symbol: TPS73630DBVT
  • Footprint: Package_TO_SOT_SMD:SOT-23-5
  • 3D model: SOT-23-5 (KiCad packages3D, STEP)
  • 3D model files: tps73630dbvt-etched.step / tps73630dbvt-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tps73630dbvt.step / tps73630dbvt.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (49 pp, sha256 5ed5c95a399b519d, retrieved 2026-10-09, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF