component
TPS71750QDRVRQ1
Public Made by Adomby adom
Texas Instruments Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, WSON-6-EP(2x2). Pinout extracted from the datasheet, KiCad symbol/footprint/3D.
main
Ray
tps71750qdrvrq1: component.models_3d pose record per STEP (Z-up, seated z=0, pad-centre origin, identity binding)
01e4c60
1mo ago
123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222
{
"schema_version": 1,
"type": "component",
"slug": "tps71750qdrvrq1",
"title": "TPS71750QDRVRQ1",
"brief": "Texas Instruments Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, WSON-6-EP(2x2). Pinout extracted from the datasheet, KiCad symbol/footprint/3D.",
"version": "0.1.0",
"license": "CC-BY-SA-4.0",
"tags": [
"component",
"power management (pmic)",
"tps71750qdrvrq1"
],
"component": {
"mpn": "TPS71750QDRVRQ1",
"manufacturer": "Texas Instruments",
"package": "WSON-6-EP(2x2)",
"pin_count": 6,
"category": "Power Management (PMIC)",
"subcategory": "Voltage Regulators - Linear, Low Drop Out (LDO) Regulators",
"datasheet": "https://www.ti.com/cn/lit/gpn/tps717-q1",
"parts": {
"symbol": "tps71750qdrvrq1.kicad_sym",
"footprint": "tps71750qdrvrq1.kicad_mod",
"model_3d": "tps71750qdrvrq1-etched.glb",
"model_3d_plain": "tps71750qdrvrq1.glb",
"model_3d_step": "tps71750qdrvrq1-etched.step",
"model_3d_step_plain": "tps71750qdrvrq1.step",
"lbr": "tps71750qdrvrq1.lbr"
},
"distributor_links": {},
"pins": [
{
"number": "1",
"name": "OUT",
"type": "power_out",
"description": "Regulated output voltage (fixed 5.0 V). Requires a minimum 1-uF ceramic capacitor to GND for stability; supports up to 100 uF and 150 mA continuous."
},
{
"number": "2",
"name": "NR",
"type": "passive",
"description": "Noise-reduction pin (fixed-voltage version). An external capacitor (typ. 0.01 uF) from NR to GND bypasses internal band-gap noise, lowering output noise (30 uVRMS typical, 100 Hz-100 kHz)."
},
{
"number": "3",
"name": "GND",
"type": "power_in",
"description": "Device ground reference. All voltages are referenced to this pin."
},
{
"number": "4",
"name": "EN",
"type": "input",
"description": "Enable input. Drive above VEN(high) (>= 1.2 V for VIN <= 5.5 V) to enable the regulator; drive below VEN(low) to place device in standby (shutdown current typ. 0.2 uA). Absolute max = VIN + 0.3 V (or 7 V, whichever is greater)."
},
{
"number": "5",
"name": "NC",
"type": "unconnected",
"description": "No internal connection. May be tied to GND to improve thermal dissipation of the WSON package."
},
{
"number": "6",
"name": "IN",
"type": "power_in",
"description": "Unregulated input supply, 2.5 V to 6.5 V (absolute max 7 V). A 0.1-uF to 1-uF ceramic capacitor to GND is recommended close to the pin for best transient/PSRR performance."
}
],
"provenance": {
"extractor": "ds2sf",
"datasheet": {
"url": "https://www.ti.com/cn/lit/gpn/tps717-q1",
"pages": null,
"sha256": "2be05880cde1a822",
"source_tier": "lcsc"
},
"cad": "KiCad official (CC-BY-SA 4.0)",
"pins": {
"total": 6,
"described": 6,
"cites_pages": true,
"refuses_to_fabricate": true
}
},
"viewers": {
"symbol": "viewers/symbol.html",
"footprint": "viewers/footprint.html"
},
"models_3d": [
{
"file": "tps71750qdrvrq1.step",
"role": "plain",
"up": "Z",
"units": "mm",
"origin": "footprint origin = pad-pattern centre",
"seat": "z = 0",
"extents_mm": [
2.0,
1.98,
0.82
],
"zmin_mm": 0.0,
"centre_offset_mm": 0.0,
"footprint_binding": "identity",
"sha256": "a159a524ab16d3406353a16f8c20b59f5679eea26e2d41174628288b5b9da702",
"checked": "2026-10-07",
"checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
},
{
"file": "tps71750qdrvrq1-etched.step",
"role": "eda",
"up": "Z",
"units": "mm",
"origin": "footprint origin = pad-pattern centre",
"seat": "z = 0",
"extents_mm": [
2.0,
1.98,
0.82
],
"zmin_mm": 0.0,
"centre_offset_mm": 0.0,
"footprint_binding": "identity",
"sha256": "5062ce8ac2cc5a02e998ade71768fec6a689e72887783050116ce3a4a7cec955",
"checked": "2026-10-07",
"checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
}
]
},
"metadata": {
"specs": {
"Manufacturer": "Texas Instruments",
"Package": "WSON-6-EP(2x2)",
"Category": "Power Management (PMIC)",
"Pins": "6"
}
},
"variants": [
{
"mpn": "TPS71750QDRVRQ1",
"kind": "packaging"
},
{
"mpn": "TPS71750QDRVRQ1DRVT",
"kind": "packaging"
},
{
"mpn": "TPS71750QDRVTQ1",
"kind": "unknown"
},
{
"mpn": "TPS71750QDRVRQ1DCKR",
"kind": "packaging"
},
{
"mpn": "TPS71750QDRVRQ1DCKT",
"kind": "packaging"
},
{
"mpn": "TPS71750QDRVRQ1QDCKRQ1",
"kind": "packaging"
},
{
"mpn": "TPS71750QDRVRQ1QDCKTQ1",
"kind": "packaging"
},
{
"mpn": "TPS71750QDRVRQ1DSER",
"kind": "packaging"
},
{
"mpn": "TPS71750QDRVRQ1DSET",
"kind": "packaging"
},
{
"mpn": "TPS71750QDRVRQ1QDSERQ1",
"kind": "packaging"
},
{
"mpn": "TPS71750QDRVRQ1QDSETQ1",
"kind": "packaging"
}
],
"sections": [
"hero",
"viewers",
"readme",
"breadcrumbs",
"info"
],
"discovery_triggers": [
"tps71750qdrvrq1"
],
"discovery_pitch": "TPS71750QDRVRQ1 (Texas Instruments) component page with datasheet-verified CAD.",
"author": {
"name": "Ray",
"email": "[email protected]"
},
"dependencies": {},
"hero": {
"type": "image",
"path": "docs/hero.png"
},
"files": [
"page.json",
"README.md",
"tps71750qdrvrq1.kicad_sym",
"tps71750qdrvrq1.kicad_mod",
"tps71750qdrvrq1.glb",
"tps71750qdrvrq1.step",
"tps71750qdrvrq1.lbr",
"docs/hero.png",
"docs/tps71750qdrvrq1-datasheet.pdf",
"viewers/symbol.html",
"viewers/footprint.html"
],
"visibility": {
"public": true
},
"updated_at": "2026-09-25T12:31:43.854Z"
}