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TPS71750QDRVRQ1

Texas Instruments · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · WSON-6-EP(2x2)

TPS71750QDRVRQ1 from Texas Instruments, in a WSON-6-EP(2x2). Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 OUT power_out Regulated output voltage (fixed 5.0 V). Requires a minimum 1-uF ceramic capacitor to GND for stability; supports up to 100 uF and 150 mA continuous.
2 NR passive Noise-reduction pin (fixed-voltage version). An external capacitor (typ. 0.01 uF) from NR to GND bypasses internal band-gap noise, lowering output noise (30 uVRMS typical, 100 Hz-100 kHz).
3 GND power_in Device ground reference. All voltages are referenced to this pin.
4 EN input Enable input. Drive above VEN(high) (>= 1.2 V for VIN <= 5.5 V) to enable the regulator; drive below VEN(low) to place device in standby (shutdown current typ. 0.2 uA). Absolute max = VIN + 0.3 V (or 7 V, whichever is greater).
5 NC unconnected No internal connection. May be tied to GND to improve thermal dissipation of the WSON package.
6 IN power_in Unregulated input supply, 2.5 V to 6.5 V (absolute max 7 V). A 0.1-uF to 1-uF ceramic capacitor to GND is recommended close to the pin for best transient/PSRR performance.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package WSON-6-EP(2x2)
Category Power Management (PMIC)
Pins 6

Ordering variants

Same part, different packaging or reel option.

  • TPS71750QDRVRQ1
  • TPS71750QDRVRQ1DRVT
  • TPS71750QDRVTQ1
  • TPS71750QDRVRQ1DCKR
  • TPS71750QDRVRQ1DCKT
  • TPS71750QDRVRQ1QDCKRQ1
  • TPS71750QDRVRQ1QDCKTQ1
  • TPS71750QDRVRQ1DSER
  • TPS71750QDRVRQ1DSET
  • TPS71750QDRVRQ1QDSERQ1
  • TPS71750QDRVRQ1QDSETQ1

CAD (KiCad official)

  • Symbol: TPS71750QDRVRQ1
  • Footprint: Package_SON:WSON-6-1EP_2x2mm_P0.65mm_EP1x1.6mm
  • 3D model: WSON-6-EP(2x2) (KiCad packages3D, STEP)
  • 3D model files: tps71750qdrvrq1-etched.step / tps71750qdrvrq1-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tps71750qdrvrq1.step / tps71750qdrvrq1.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (None pp, sha256 2be05880cde1a822, retrieved 2026-08-17, tier: lcsc)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF