TPS650940A0RSKR

{
  "slug": "tps650940a0rskr",
  "version": "0.1.0",
  "type": "component",
  "description": "Texas Instruments Battery Management, QFN-64-EP(8x8). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
  "tags": [
    "component",
    "power management (pmic)",
    "tps650940a0rskr",
    "factory-2.0.0",
    "extractor-text"
  ],
  "dependencies": {},
  "hero": {
    "type": "image",
    "path": "docs/hero.png"
  },
  "files": [
    "page.json",
    "README.md",
    "tps650940a0rskr.kicad_sym",
    "tps650940a0rskr.kicad_mod",
    "tps650940a0rskr.glb",
    "tps650940a0rskr.step",
    "tps650940a0rskr.lbr",
    "docs/hero.png",
    "docs/tps650940a0rskr-datasheet.pdf",
    "viewers/symbol.html",
    "viewers/footprint.html",
    "tps650940a0rskr-hero.glb",
    "tps650940a0rskr-hero.overlay.json"
  ],
  "component": {
    "mpn": "TPS650940A0RSKR",
    "manufacturer": "Texas Instruments",
    "package": "QFN-64-EP(8x8)",
    "pin_count": 65,
    "category": "Power Management (PMIC)",
    "subcategory": "Battery Management",
    "datasheet": "https://www.ti.com/cn/lit/gpn/tps65094",
    "parts": {
      "symbol": "tps650940a0rskr.kicad_sym",
      "footprint": "tps650940a0rskr.kicad_mod",
      "model_3d": "tps650940a0rskr-hero.glb",
      "model_3d_plain": "tps650940a0rskr.glb",
      "model_3d_step": "tps650940a0rskr-etched.step",
      "model_3d_step_plain": "tps650940a0rskr.step",
      "lbr": "tps650940a0rskr.lbr"
    },
    "distributor_links": {
      "lcsc": "C702306",
      "digikey": "TPS650940A0RSKR-ND",
      "mouser": "595-TPS650940A0RSKR"
    },
    "distributor_check": {
      "checked_at": "2026-10-11T23:21:29Z",
      "source": "Component Ocean /api/assign-pns",
      "digikey": {
        "pn": "TPS650940A0RSKR-ND",
        "status": "found",
        "lifecycle": "Active"
      },
      "mouser": {
        "pn": "595-TPS650940A0RSKR",
        "status": "found"
      }
    },
    "pins": [
      {
        "number": "1",
        "name": "FBGND2",
        "type": "input",
        "description": "Remote negative feedback sense for the BUCK2 controller, connected to the VCCGI VSS SENSE signal sent from the SoC to the PMIC."
      },
      {
        "number": "2",
        "name": "FBVOUT2",
        "type": "input",
        "description": "Remote positive feedback sense for the BUCK2 controller, connected to the VCCGI VCC SENSE signal sent from the SoC to the PMIC."
      },
      {
        "number": "3",
        "name": "DRVH2",
        "type": "output",
        "description": "High-side gate driver output for the BUCK2 controller, referenced to VSYS + 5 V."
      },
      {
        "number": "4",
        "name": "SW2",
        "type": "input",
        "description": "Switch node connection for the BUCK2 controller."
      },
      {
        "number": "5",
        "name": "BOOT2",
        "type": "input",
        "description": "Bootstrap pin for the BUCK2 controller; connect a 100-nF ceramic capacitor between this pin and SW2."
      },
      {
        "number": "6",
        "name": "PGNDSNS2",
        "type": "power_in",
        "description": "Power GND connection for BUCK2; connect to the ground terminal of the external low-side FET."
      },
      {
        "number": "7",
        "name": "DRVL2",
        "type": "output",
        "description": "Low-side gate driver output for the BUCK2 controller, 5 V level."
      },
      {
        "number": "8",
        "name": "DRV5V_2_A1",
        "type": "power_in",
        "description": "5-V supply to the BUCK2 gate driver and LDOA1; bypass to ground with a 2.2-µF (typical) ceramic capacitor, shorted on board to LDO5P0."
      },
      {
        "number": "9",
        "name": "LDOA1",
        "type": "power_out",
        "description": "LDOA1 output, 1.35-3.3 V; bypass to ground with a 4.7-µF (typical) ceramic capacitor and leave floating when not in use."
      },
      {
        "number": "10",
        "name": "LX3",
        "type": "output",
        "description": "Switch node connection for the BUCK3 converter; connect to a 0.47-µH (typical) inductor with less than 50-mΩ DCR."
      },
      {
        "number": "11",
        "name": "PVIN3",
        "type": "power_in",
        "description": "5-V power input to the BUCK3 converter; bypass to ground with a 10-µF (typical) ceramic capacitor."
      },
      {
        "number": "12",
        "name": "FB3",
        "type": "input",
        "description": "Remote feedback sense for the BUCK3 converter; connect to the positive terminal of the output capacitor."
      },
      {
        "number": "13",
        "name": "PMICEN",
        "type": "input",
        "description": "PMIC cold-boot pin; the rising edge transitions the power state from G3 to S4/S5, and driving it low shuts down all VRs."
      },
      {
        "number": "14",
        "name": "LDOLS_EN or SWA1_EN",
        "type": "input",
        "description": "Enable pin for LDOA2, LDOA3 and SWA1 when OTP is configured to LDOLS_EN, or for SWA1 only when OTP is configured to SWA1_EN; resources turn on at assertion (H) and off at deassertion (L)."
      },
      {
        "number": "15",
        "name": "IRQB",
        "type": "output",
        "description": "Open-drain output interrupt pin; see the IRQ PMIC Interrupt Register for definitions."
      },
      {
        "number": "16",
        "name": "RSMRSTB",
        "type": "output",
        "description": "Open-drain always-on-rail power good that reflects a valid state whenever VSYS is available."
      },
      {
        "number": "17",
        "name": "SWB1",
        "type": "power_out",
        "description": "Output of load switch B1, 0.5-3.3 V (1.8 V typical); bypass to ground with a 0.1-µF (typical) ceramic capacitor and short with SWB2."
      },
      {
        "number": "18",
        "name": "PVINSWB1_B2",
        "type": "power_in",
        "description": "Power supply to load switches B1 and B2, 0.5-3.3 V (1.8 V typical); bypass with a 1-µF (typical) ceramic capacitor and connect to ground when not in use."
      },
      {
        "number": "19",
        "name": "SWB2",
        "type": "power_out",
        "description": "Output of load switch B2, 0.5-3.3 V (1.8 V typical); bypass to ground with a 0.1-µF (typical) ceramic capacitor and short with SWB1."
      },
      {
        "number": "20",
        "name": "LX5",
        "type": "output",
        "description": "Switch node connection for the BUCK5 converter; connect to a 0.47-µH (typical) inductor with less than 50-mΩ DCR."
      },
      {
        "number": "21",
        "name": "PVIN5",
        "type": "power_in",
        "description": "5-V power input to the BUCK5 converter; bypass to ground with a 10-µF (typical) ceramic capacitor."
      },
      {
        "number": "22",
        "name": "FB5",
        "type": "input",
        "description": "Remote feedback sense for the BUCK5 converter; connect to the positive terminal of the output capacitor."
      },
      {
        "number": "23",
        "name": "FB4",
        "type": "input",
        "description": "Remote feedback sense for the BUCK4 converter; connect to the positive terminal of the output capacitor."
      },
      {
        "number": "24",
        "name": "PVIN4",
        "type": "power_in",
        "description": "5-V power input to the BUCK4 converter; bypass to ground with a 10-µF (typical) ceramic capacitor."
      },
      {
        "number": "25",
        "name": "LX4",
        "type": "output",
        "description": "Switch node connection for the BUCK4 converter; connect to a 0.47-µH (typical) inductor with less than 50-mΩ DCR."
      },
      {
        "number": "26",
        "name": "GPO",
        "type": "output",
        "description": "Open-drain output controlled by an I2C GPO_CTRL register bit, usable as an enable signal to an external VR."
      },
      {
        "number": "27",
        "name": "PCH_PWROK",
        "type": "output",
        "description": "Open-drain global power good that reflects a valid state whenever VSYS is available."
      },
      {
        "number": "28",
        "name": "PROCHOT",
        "type": "output",
        "description": "Optional open-drain output indicating a PMIC thermal event when any die temperature sensor detects the THOT temperature; invert before connecting to the SoC if used, otherwise leave floating."
      },
      {
        "number": "29",
        "name": "FBVOUT1",
        "type": "input",
        "description": "Remote feedback sense for the BUCK1 controller, connected to the VNN VCC SENSE signal sent from the SoC to the PMIC."
      },
      {
        "number": "30",
        "name": "ILIM1",
        "type": "input",
        "description": "Current limit set pin for the BUCK1 controller; fit a resistor from this pin to ground to set the external low-side FET current limit."
      },
      {
        "number": "31",
        "name": "SWA1",
        "type": "power_out",
        "description": "Output of load switch A1, 0.5-3.3 V; bypass to ground with a 0.1-µF (typical) ceramic capacitor and leave floating when not in use."
      },
      {
        "number": "32",
        "name": "PVINSWA1",
        "type": "power_in",
        "description": "Power supply to load switch A1, 0.5-3.3 V; bypass with a 1-µF (typical) ceramic capacitor and connect to ground when not in use."
      },
      {
        "number": "33",
        "name": "DRVH1",
        "type": "output",
        "description": "High-side gate driver output for the BUCK1 controller, referenced to VSYS + 5 V."
      },
      {
        "number": "34",
        "name": "SW1",
        "type": "input",
        "description": "Switch node connection for the BUCK1 controller."
      },
      {
        "number": "35",
        "name": "BOOT1",
        "type": "input",
        "description": "Bootstrap pin for the BUCK1 controller; connect a 100-nF ceramic capacitor between this pin and SW1."
      },
      {
        "number": "36",
        "name": "PGNDSNS1",
        "type": "power_in",
        "description": "Power GND connection for BUCK1; connect to the ground terminal of the external low-side FET."
      },
      {
        "number": "37",
        "name": "DRVL1",
        "type": "output",
        "description": "Low-side gate driver output for the BUCK1 controller, 5 V level."
      },
      {
        "number": "38",
        "name": "DRV5V_1_6",
        "type": "power_in",
        "description": "5-V supply to the BUCK1 and BUCK6 gate drivers; bypass to ground with a 2.2-µF (typical) ceramic capacitor, shorted on board to LDO5P0."
      },
      {
        "number": "39",
        "name": "DRVL6",
        "type": "output",
        "description": "Low-side gate driver output for the BUCK6 controller, 5 V level."
      },
      {
        "number": "40",
        "name": "PGNDSNS6",
        "type": "power_in",
        "description": "Power GND connection for BUCK6; connect to the ground terminal of the external low-side FET."
      },
      {
        "number": "41",
        "name": "BOOT6",
        "type": "input",
        "description": "Bootstrap pin for the BUCK6 controller; connect a 100-nF ceramic capacitor between this pin and SW6."
      },
      {
        "number": "42",
        "name": "SW6",
        "type": "input",
        "description": "Switch node connection for the BUCK6 controller."
      },
      {
        "number": "43",
        "name": "DRVH6",
        "type": "output",
        "description": "High-side gate driver output for the BUCK6 controller, referenced to VSYS + 5 V."
      },
      {
        "number": "44",
        "name": "FBVOUT6",
        "type": "input",
        "description": "Remote feedback sense for the BUCK6 controller; connect to the positive terminal of the output capacitor."
      },
      {
        "number": "45",
        "name": "ILIM6",
        "type": "input",
        "description": "Current limit set pin for the BUCK6 controller; fit a resistor from this pin to ground to set the external low-side FET current limit."
      },
      {
        "number": "46",
        "name": "PVINVTT",
        "type": "power_in",
        "description": "Power supply to the VTT LDO at VDDQ; bypass to ground with a 10-µF (minimum) ceramic capacitor and connect to ground when not in use."
      },
      {
        "number": "47",
        "name": "VTT",
        "type": "power_out",
        "description": "Output of the VTT LDO at VDDQ / 2; bypass to ground with 2× 22-µF (minimum) ceramic capacitors and leave floating when not in use."
      },
      {
        "number": "48",
        "name": "VTTFB",
        "type": "input",
        "description": "Remote feedback sense for the VTT LDO; connect to the positive terminal of the output capacitor and short to GND when not in use."
      },
      {
        "number": "49",
        "name": "LDOA3",
        "type": "power_out",
        "description": "Output of LDOA3, 0.7-1.5 V; bypass to ground with a 4.7-µF (typical) ceramic capacitor and leave floating when not in use."
      },
      {
        "number": "50",
        "name": "PVINLDOA2_A3",
        "type": "power_in",
        "description": "Power supply to LDOA2 and LDOA3, 1.8 V; bypass to ground with a 4.7-µF (typical) ceramic capacitor and connect to ground when not in use."
      },
      {
        "number": "51",
        "name": "LDOA2",
        "type": "power_out",
        "description": "Output of LDOA2, 0.7-1.5 V; bypass to ground with a 4.7-µF (typical) ceramic capacitor and leave floating when not in use."
      },
      {
        "number": "52",
        "name": "AGND",
        "type": "power_in",
        "description": "Analog ground that must not be connected to the thermal pad ground on the top layer and must connect to the ground of the VREF capacitor."
      },
      {
        "number": "53",
        "name": "VREF",
        "type": "power_out",
        "description": "1.25 V band-gap reference output; stabilize by connecting a 100-nF (typical) ceramic capacitor between this pin and quiet ground."
      },
      {
        "number": "54",
        "name": "LDO3P3",
        "type": "power_out",
        "description": "Output of the 3.3-V internal LDO; bypass to ground with a 4.7-µF (typical) ceramic capacitor."
      },
      {
        "number": "55",
        "name": "VSYS",
        "type": "power_in",
        "description": "System voltage detection and input to the internal 3.3-V and 5-V LDOs; bypass to ground with a 1-µF (typical) ceramic capacitor."
      },
      {
        "number": "56",
        "name": "LDO5P0",
        "type": "power_out",
        "description": "Output of the 5-V internal LDO or of an internal switch connecting this pin to V5ANA; bypass to ground with a 4.7-µF (typical) ceramic capacitor."
      },
      {
        "number": "57",
        "name": "V5ANA",
        "type": "power_in",
        "description": "External 5-V supply input to the internal load switch that connects to LDO5P0; an optional ceramic capacitor improves transient performance."
      },
      {
        "number": "58",
        "name": "CLK",
        "type": "input",
        "description": "I2C clock input."
      },
      {
        "number": "59",
        "name": "DATA",
        "type": "bidirectional",
        "description": "I2C data line."
      },
      {
        "number": "60",
        "name": "THERMTRIPB",
        "type": "input",
        "description": "Thermal shutdown signal from the SoC."
      },
      {
        "number": "61",
        "name": "SLP_S0B",
        "type": "input",
        "description": "Power state pin; the PMIC enters Connected Standby at the falling edge and exits at the rising edge."
      },
      {
        "number": "62",
        "name": "SLP_S3B",
        "type": "input",
        "description": "Power state pin; the PMIC enters S3 at the falling edge and exits S3 into S0 at the rising edge."
      },
      {
        "number": "63",
        "name": "SLP_S4B",
        "type": "input",
        "description": "Power state pin; the PMIC enters S4 at the falling edge and exits S4 into S3 at the rising edge."
      },
      {
        "number": "64",
        "name": "ILIM2",
        "type": "input",
        "description": "Current limit set pin for the BUCK2 controller; fit a resistor from this pin to ground to set the external low-side FET current limit."
      },
      {
        "number": "65",
        "name": "EP",
        "type": "passive",
        "description": "Exposed pad (from the footprint; not named in the datasheet pin table)."
      }
    ],
    "provenance": {
      "extractor": "extract_pins 0.3",
      "factory_chain": {
        "factory": "2.0.0",
        "extractor": "extract_pins 0.3",
        "primary_model": "claude-haiku-5-5",
        "primary_mode": "text",
        "consensus_model": "claude-sonnet-5-5",
        "consensus": "agreed",
        "guards": "pin_guards 0.1: passed",
        "guard_notes": [
          "extractor flagged: Package match: the orderable addendum (page 83) lists TPS650940A0RSKR as VQFN (RSK), 64 pins, and th; Thermal pad (labeled PGND/Thermal Pad on page 4 and THERMAL PAD on page 7) has no numeric pin number; Pin 14 is OTP-dependent: the name is printed as 'LDOLS_EN or SWA1_EN'. For TPS650940 the OTP table (",
          "exposed pad 65 added from the footprint"
        ],
        "pages_sent": 18,
        "cost_usd": 0.159,
        "at": "2026-10-11T23:21:05"
      },
      "datasheet": {
        "url": "https://www.ti.com/cn/lit/gpn/tps65094",
        "pages": 94,
        "sha256": "5f0839e7e2610575",
        "source_tier": "lcsc"
      },
      "cad": "KiCad official (CC-BY-SA 4.0)",
      "pins": {
        "total": 65,
        "described": 65,
        "cites_pages": true,
        "refuses_to_fabricate": true
      }
    },
    "viewers": {
      "symbol": "viewers/symbol.html",
      "footprint": "viewers/footprint.html"
    },
    "models_3d": [
      {
        "file": "tps650940a0rskr.step",
        "role": "plain",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          8.0,
          8.0,
          0.87
        ],
        "zmin_mm": 0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "553641350988a3d949874ef3cbbe3efa6e239859177963f45ba4e900f4c74ccf",
        "checked": "2026-10-11",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      },
      {
        "file": "tps650940a0rskr-etched.step",
        "role": "eda",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          8.0,
          8.0,
          0.87
        ],
        "zmin_mm": 0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "c0caa8454f8b9b1a3548d57fbc3b3c50b0e7a45ce0af00cda14f762b1a2eb17e",
        "checked": "2026-10-11",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      }
    ]
  }
}