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TPS62A02APDDCR

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TEXAS INSTRUMENTS Global Sourcing Parts, TSOT-23-6. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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TPS62A02APDDCR

TEXAS INSTRUMENTS · Global Sourcing Parts · TSOT-23-6

TPS62A02APDDCR from TEXAS INSTRUMENTS, in a TSOT-23-6. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 EN input Device enable logic input: logic high enables the device, logic low disables it and puts it into shutdown, and the pin must not be left floating.
2 GND power_in Ground pin.
3 SW output Switch pin connected to the internal FET switches and inductor terminal; the output filter inductor connects to this pin.
4 VIN power_in Input voltage pin, specified for 2.5 V to 5.5 V; the input capacitor should be placed as close as possible between VIN and GND.
5 PG output Power-good open-drain output; the pullup resistor cannot be connected to any voltage higher than 5.5 V, and if unused the pin can be left open or connected to GND.
6 FB input Feedback pin for the internal control loop, to be connected to an external feedback divider that sets the output from 0.6 V up to VIN.

Key specifications

Parameter Value
Manufacturer TEXAS INSTRUMENTS
Package TSOT-23-6
Category Global Sourcing Parts
Pins 6

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
VIN Input supply voltage range VIN 2.5 5.5 V 4
Output current range (TPS62A02) IOUT 0 2 A TPS62A02 4
Power Good input current capability IPG 0 1 mA 4
Operating junction temperature range TJ -40 125 °C 4
Output voltage range VOUT 0.6 V Maximum is VIN (not numeric) 4
Pin voltage VIN, EN, PG -0.3 6.5 V 4
Pin voltage SW, DC -0.3 V Maximum is VIN + 0.3 V (not numeric) 4
Pin voltage SW, transient -3 10 V transient < 10 ns 4
Pin voltage FB -0.3 3 V 4
Operating junction temperature TJ -40 150 °C 4
Storage temperature Tstg -55 150 °C 4
VIN UVLO rising threshold VUVLO(R) 2.3 2.4 2.5 V VIN rising 5
VIN UVLO falling threshold VUVLO(F) 2.2 2.3 2.4 V VIN falling 5
FB voltage VFB 594 600 606 mV TJ = 0°C to 125°C, PWM mode 5
FB voltage VFB 591 600 609 mV PWM mode 5
High-side peak current limit (TPS62A02) IHS(OC) 2.7 3.4 A TPS62A02 5
Shutdown supply current ISD(VIN) 0.01 2 µA VEN = Low 5
VIN quiescent current (TPS62A02, DDC) IQ(VIN) 23 µA Non-switching; VEN = High; VFB = 610 mV; TPS62A01xDDC; TPS62A02 5
EN voltage rising threshold VEN(R) 1.2 V EN rising; enable switching 5
EN voltage falling threshold VEN(F) 0.4 V EN falling, disable switching 5
EN input leakage current VEN(LKG) 100 nA VEN = 5 V 5
FB input leakage current IFB(LKG) 100 nA VFB = 0.6 V 5
Switching frequency, FPWM operation fSW(FCCM) 2400 kHz VIN = 5 V; VOUT = 1.8 V 5
Internal fixed soft-start time 1 ms From EN = High to VFB = 0.56 V 5
High-side MOSFET on-resistance (TPS62A02, DDC) RDSON(HS) 100 mΩ VIN = 5 V; TPS62A01xDDC; TPS62A02 5
Low-side MOSFET on-resistance (TPS62A02, DDC) RDSON(LS) 67 mΩ VIN = 5 V; TPS62A01xDDC; TPS62A02 5
Low-side valley current limit (TPS62A02xDDC) ILS(OC) 3.15 A TPS62A02xDDC 5
Power Good threshold (PG low, FB falling) VPGTH 93.5 % PG low, FB falling 5
Power Good threshold (PG high, FB rising) VPGTH 96 % PG high, FB rising 5
PG delay falling 35 µs 5
PG delay rising 10 µs 5
PG pin leakage current when open-drain output is high IPG(LKG) 100 nA VPG = 5 V 5
PG pin output low-level voltage 400 mV IPG = 1 mA 5
Output discharge current on SW pin (TPS62A02, DDC) 76 mA VIN = 3 V, VOUT = 2.0 V; TPS62A01xDDC; TPS62A02 6
Thermal shutdown threshold TJ(SD) 170 °C Temperature rising 6
Thermal shutdown hysteresis TJ(HYS) 20 °C 6
Effective inductance L 1 µH 4
Output capacitance COUT 44 µF VOUT < 1.2 V 4
Output capacitance COUT 22 µF 1.2 V ≤ VOUT < 1.8 V 4
Output capacitance COUT 10 µF VOUT ≥ 1.8 V 4
Junction-to-ambient thermal resistance (DDC) RθJA 132.1 °C/W 4
Junction-to-case (top) thermal resistance (DDC) RθJC(top) 74.9 °C/W 4
Junction-to-board thermal resistance (DDC) RθJB 45.5 °C/W 4
Junction-to-top characterization parameter (DDC) ψJT 25.5 °C/W 4
Junction-to-board characterization parameter (DDC) ψJB 45.1 °C/W 5

CAD (KiCad official)

  • Symbol: TPS62A02APDDCR
  • Footprint: Package_TO_SOT_SMD:TSOT-23-6
  • 3D model: TSOT-23-6 (KiCad packages3D, STEP)
  • 3D model files: tps62a02apddcr-etched.step / tps62a02apddcr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tps62a02apddcr.step / tps62a02apddcr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: TEXAS INSTRUMENTS datasheet (31 pp, sha256 872cff1ae849dba0, retrieved 2026-10-18, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF