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TPS61378QWRTERQ1
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Texas Instruments DC-DC Converters, WQFN-16-EP(3x3). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownTPS61378QWRTERQ1
Texas Instruments · DC-DC Converters · WQFN-16-EP(3x3)
TPS61378QWRTERQ1 from Texas Instruments, in a WQFN-16-EP(3x3). Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VIN | power_in | Power supply input ranging from 2.3 V to 14 V with 25 to 35 μA quiescent current |
| 2 | BST | input | Bootstrap supply for high-side FET gate driver; ceramic capacitor must connect between this pin and SW pin |
| 3 | SW | output | Switching node connected to low-side FET drain and high-side FET source, actively driven at 200 kHz to 2.2 MHz |
| 4 | SW | output | Switching node connected to low-side FET drain and high-side FET source, actively driven at 200 kHz to 2.2 MHz |
| 5 | MODE/SYNC | input | Mode selection for forced PWM mode (logic high) or auto PFM mode (logic low or floating); supports external clock synchronization |
| 6 | VCC | power_out | Regulated 4.8 V output; 1 μF minimum ceramic capacitor required to GND |
| 7 | GND | power_in | Power ground of IC connected to low-side FET source; must connect to ground plane and thermal pad |
| 8 | GND | power_in | Power ground of IC connected to low-side FET source; must connect to ground plane and thermal pad |
| 9 | VO | power_out | Output of isolation FET for load connection to achieve input/output galvanic isolation |
| 10 | OUT | power_out | Output of high-side FET drain; connect this pin or short with VO pin to enable load disconnect and short protection features |
| 11 | PG | output | Open-drain power good indicator output; pulled high 2.5 to 4.3 ms after VOUT reaches 90% of target voltage |
| 12 | ILIM | input | Current limit setting pin; connect resistor to GND to program peak current limit from 1 A to 4.8 A |
| 13 | FB | input | Feedback input pin; use resistor divider to set desired output voltage between 4.0 V and 18.5 V |
| 14 | COMP | input | Compensation network connection for external RC network to optimize loop stability and transient response |
| 15 | EN | input | Enable logic input; device active when pulled above 1.2 V threshold |
| 16 | FREQ | input | Frequency setting pin; connect resistor to GND to program switching frequency from 200 kHz to 2.2 MHz |
| 17 | Thermal Pad | passive | Exposed thermal pad; must solder to power ground plane for efficient junction heat dissipation |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | WQFN-16-EP(3x3) |
| Category | Power Management (PMIC) |
| Pins | 17 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Input voltage range (recommended) | VIN | 2.3 | 14 | V | 5 | ||
| Output voltage (recommended) | VOUT | 4 | 18.5 | V | 5 | ||
| Operating junction temperature (recommended) | TJ | -40 | 150 | °C | 5 | ||
| Voltage range at VIN | VIN | -0.3 | 16 | V | 5 | ||
| Voltage range at VO, SW, OUT | VO, SW, OUT | -0.3 | 23 | V | 5 | ||
| Voltage range at BST | BST | -0.3 | V | 5 | |||
| Voltage range at MODE/SYNC, FB, FREQ, ILIM, VCC, COMP, EN | -0.3 | 6 | V | 5 | |||
| Voltage range at PG | PG | -0.3 | 20 | V | 5 | ||
| Operating junction temperature (absolute maximum) | TJ | -40 | 150 | °C | 5 | ||
| Storage temperature | Tstg | -65 | 150 | °C | 5 | ||
| Input voltage range | VIN | 2.3 | 14 | V | 6 | ||
| Quiescent current into VIN pin | IQ | 25 | 35 | µA | IC enabled, no load, VIN = 3.3 V, VOUT = 18.5 V, VFB = VREF + 0.1 V | 6 | |
| Quiescent current into OUT pin | IQ | 10 | 20 | µA | IC enabled, no load, VIN = 3.3 V, VOUT = 18.5 V, VFB = VREF + 0.1 V | 6 | |
| Shutdown current into VIN pin | ISD | 0.6 | 5 | µA | IC disabled, VIN =14 V, EN = GND | 6 | |
| Output over-voltage protection threshold | VOVP | 19.3 | 20 | 20.5 | V | VIN = 3.3 V, VOUT rising | 6 |
| Reference voltage at FB pin (adjustable option) | VREF | 0.788 | 0.8 | 0.812 | V | TJ = -40 to 125°C, RFB = 16.0kΩ | 6 |
| Peak switching current limit (FPWM) | ILIM_SW | 4 | 4.8 | 5.55 | A | RLIM = 20 kΩ , Duty cycle = 65% | 7 |
| Peak switching current limit (Auto PFM) | ILIM_SW | 4 | 4.8 | 5.55 | A | RLIM = 20 kΩ , Duty cycle = 65% | 7 |
| Peak switching current limit at soft start | ILIM_SS_1 | 0.9 | 1.15 | 1.4 | A | VIN = 3.3 V, VOUT = 0 V, RLIM = 20 kΩ | 7 |
| Switching frequency | Fsw | 2050 | 2200 | 2400 | kHz | RFREQ = 18 kΩ | 7 |
| Switching frequency | Fsw | 180 | 200 | 230 | kHz | RFREQ = 218 kΩ | 7 |
| PG delay time | tPG_DELAY | 2.5 | 3.4 | 4.3 | ms | 7 | |
| Sync frequency minimum | fSYNC_MIN | 200 | kHz | 7 | |||
| Sync frequency maximum | fSYNC_MAX | 2200 | kHz | 7 | |||
| Junction-to-ambient thermal resistance | RθJA | 46.2 | °C/W | 5 | |||
| Junction-to-case (top) thermal resistance | RθJC(top) | 43.5 | °C/W | 5 | |||
| Junction-to-board thermal resistance | RθJB | 18.5 | °C/W | 5 | |||
| Junction-to-case (bottom) thermal resistance | RθJC(bot) | 8.8 | °C/W | 6 |
CAD (KiCad official)
- Symbol:
TPS61378QWRTERQ1 - Footprint:
Package_DFN_QFN:QFN-16-1EP_3x3mm_P0.5mm_EP1.7x1.7mm - 3D model: WQFN-16-EP(3x3) (KiCad packages3D, STEP)
- 3D model files:
tps61378qwrterq1-etched.step/tps61378qwrterq1-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);tps61378qwrterq1.step/tps61378qwrterq1.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (42 pp, sha256
3799e162e33f3792, retrieved 2026-09-23, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.2, primaryclaude-haiku-4-5-20251001(text), consensusclaude-sonnet-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).