component
TPS613785QWRTERQ1
Public Made by Adomby adom
Texas Instruments DC-DC Converters, WQFN-16(3x3). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownTPS613785QWRTERQ1
Texas Instruments · DC-DC Converters · WQFN-16(3x3)
TPS613785QWRTERQ1 from Texas Instruments, in a WQFN-16(3x3). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VIN | power_in | IC power supply input, operating range 2.3V to 14V with UVLO threshold at 2.04V rising, 2.2V falling. |
| 2 | BST | power_in | Bootstrap supply for high-side N-MOSFET gate driver, requires 0.1µF to 1µF ceramic capacitor between BST and SW. |
| 3 | SW | passive | Switching node pin connected to drain of low-side FET and source of high-side FET. |
| 4 | SW | passive | Switching node pin connected to drain of low-side FET and source of high-side FET. |
| 5 | MODE/SYNC | input | Mode selection and clock synchronization input; logic high selects forced PWM mode, low or floating selects auto PFM mode. |
| 6 | VCC | power_in | Regulated 4.8V output of internal LDO regulator, requires 1µF minimum ceramic capacitor to GND. |
| 7 | GND | power_in | Power ground and reference of the IC, connected to source of low-side FET. |
| 8 | GND | power_in | Power ground and reference of the IC, connected to source of low-side FET. |
| 9 | VO | output | Output of isolation FET, connect load to this pin to achieve input/output isolation. |
| 10 | OUT | output | Output of high-side FET drain, connect this pin to disable load disconnect protection or short to VO pin. |
| 11 | PG | output | Power good indicator with open-drain output, goes high 3.4ms after VOUT reaches 90% of target voltage. |
| 12 | ILIM | input | Current limit setting pin, connect resistor to GND to program peak current limit from 1A to 4.8A. |
| 13 | FB | input | Feedback pin for output voltage regulation via resistor divider, reference voltage 0.8V nominal. |
| 14 | COMP | input | Compensation network connection point for error amplifier output, external RC network optimizes loop stability. |
| 15 | EN | input | Enable logic input, high (>1.2V) enables converter operation, low (<0.4V) disables with 0.5µA shutdown current. |
| 16 | FREQ | input | Frequency setting pin, connect resistor to GND to program switching frequency from 200kHz to 2.2MHz. |
| 17 | Thermal Pad | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | WQFN-16(3x3) |
| Category | Power Management (PMIC) |
| Pins | 17 |
CAD (KiCad official)
- Symbol:
TPS613785QWRTERQ1 - Footprint:
Package_DFN_QFN:QFN-16-1EP_3x3mm_P0.5mm_EP1.7x1.7mm - 3D model: WQFN-16(3x3) (KiCad packages3D, STEP)
- 3D model files:
tps613785qwrterq1-etched.step/tps613785qwrterq1-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);tps613785qwrterq1.step/tps613785qwrterq1.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (42 pp, sha256
3799e162e33f3792, retrieved 2026-09-24, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.2, primaryclaude-haiku-4-5-20251001(text), consensusclaude-sonnet-4-6(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).