TPS59641RSLT

{
  "slug": "tps59641rslt",
  "version": "0.1.0",
  "type": "component",
  "description": "Texas Instruments Power Management - Specialized, VQFN-48(6x6). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
  "tags": [
    "component",
    "power management (pmic)",
    "tps59641rslt",
    "factory-2.0.0",
    "extractor-text"
  ],
  "dependencies": {},
  "hero": {
    "type": "image",
    "path": "docs/hero.png"
  },
  "files": [
    "page.json",
    "README.md",
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    "tps59641rslt.kicad_mod",
    "tps59641rslt.glb",
    "tps59641rslt.step",
    "tps59641rslt.lbr",
    "docs/hero.png",
    "docs/tps59641rslt-datasheet.pdf",
    "viewers/symbol.html",
    "viewers/footprint.html"
  ],
  "component": {
    "mpn": "TPS59641RSLT",
    "manufacturer": "Texas Instruments",
    "package": "VQFN-48(6x6)",
    "pin_count": 49,
    "category": "Power Management (PMIC)",
    "subcategory": "Power Management - Specialized",
    "datasheet": "https://www.ti.com/cn/lit/gpn/tps51640a",
    "parts": {
      "symbol": "tps59641rslt.kicad_sym",
      "footprint": "tps59641rslt.kicad_mod",
      "model_3d": "tps59641rslt-etched.glb",
      "model_3d_plain": "tps59641rslt.glb",
      "model_3d_step": "tps59641rslt-etched.step",
      "model_3d_step_plain": "tps59641rslt.step",
      "lbr": "tps59641rslt.lbr"
    },
    "distributor_links": {
      "lcsc": "C524273",
      "digikey": "296-30537-2-ND",
      "mouser": "595-TPS59641RSLT"
    },
    "distributor_check": {
      "checked_at": "2026-10-01T18:05:43Z",
      "source": "Component Ocean /api/assign-pns",
      "digikey": {
        "pn": "296-30537-2-ND",
        "status": "found",
        "lifecycle": "Active"
      },
      "mouser": {
        "pn": "595-TPS59641RSLT",
        "status": "found"
      }
    },
    "pins": [
      {
        "number": "1",
        "name": "CTHERM",
        "type": "bidirectional",
        "description": "Thermal sensor connection for the CPU converter; resistor connected to VREF forms a divider with NTC thermistor connected to GND."
      },
      {
        "number": "2",
        "name": "COCP-I",
        "type": "input",
        "description": "Resistor to GND (RCOCP) selects 1 of 8 OCP levels of the CPU converter; voltage divider to CIMON."
      },
      {
        "number": "3",
        "name": "CIMON",
        "type": "output",
        "description": "Analog current monitor output for the CPU converter; connect 220-nF capacitor to GND for stability."
      },
      {
        "number": "4",
        "name": "CCSP1",
        "type": "input",
        "description": "Positive current sense input for CPU phase 1; connect to most positive node of current sense resistor or inductor DCR sense network."
      },
      {
        "number": "5",
        "name": "CCSN1",
        "type": "input",
        "description": "Negative current sense input for CPU phase 1; connect to most negative node of current sense resistor or inductor DCR sense network; has secondary OVP comparator."
      },
      {
        "number": "6",
        "name": "CCSN2",
        "type": "input",
        "description": "Negative current sense input for CPU phase 2; connect to most negative node of current sense resistor or inductor DCR sense network."
      },
      {
        "number": "7",
        "name": "CCSP2",
        "type": "input",
        "description": "Positive current sense input for CPU phase 2; connect to most positive node of current sense resistor or inductor DCR sense network."
      },
      {
        "number": "8",
        "name": "CCSP3",
        "type": "input",
        "description": "Positive current sense input for CPU phase 3; tie to V3R3 to disable the phase; tie CCSP1 to V3R3 to run GPU converter only."
      },
      {
        "number": "9",
        "name": "CCSN3",
        "type": "input",
        "description": "Negative current sense input for CPU phase 3; part of three-phase current sensing network."
      },
      {
        "number": "10",
        "name": "CCOMP",
        "type": "output",
        "description": "Output of GM error amplifier for the CPU converter; resistor to VREF sets the droop gain."
      },
      {
        "number": "11",
        "name": "CVFB",
        "type": "input",
        "description": "Voltage sense line tied directly to VCORE of the CPU converter; soft-stop transistor is on this pin; tie to VCORE with 10-\u03a9 resistor to close feedback when \u00b5P not in socket."
      },
      {
        "number": "12",
        "name": "CGFB",
        "type": "input",
        "description": "Voltage sense return tied for the CPU converter; tie to GND with 10-\u03a9 resistor to close feedback when microprocessor is not in the socket."
      },
      {
        "number": "13",
        "name": "CF-IMAX",
        "type": "input",
        "description": "Voltage divider to VREF; resistor to GND sets operating frequency of CPU converter; voltage level sets maximum operating current as VIMAX = VREF \u00d7 IMAX / 255; latched at start-up."
      },
      {
        "number": "14",
        "name": "VREF",
        "type": "power_in",
        "description": "1.7-V, 500-\u00b5A reference output; bypass to GND with 0.22-\u00b5F ceramic capacitor."
      },
      {
        "number": "15",
        "name": "V3R3",
        "type": "power_in",
        "description": "3.3-V power input; bypass to GND with \u22651 \u00b5F ceramic capacitor."
      },
      {
        "number": "16",
        "name": "VR_ON",
        "type": "input",
        "description": "IMVP-7 VR enable; 1V I/O logic level; 100-ns de-bounce; regulator enters controlled soft-stop when brought low."
      },
      {
        "number": "17",
        "name": "CPGOOD",
        "type": "tri_state",
        "description": "IMVP-7_PWRGD output for CPU converter; open-drain; upper threshold VDAC +220 mV, lower threshold VDAC -315 mV."
      },
      {
        "number": "18",
        "name": "VCLK",
        "type": "input",
        "description": "SVID clock input; 1-V logic level."
      },
      {
        "number": "19",
        "name": "ALERT",
        "type": "tri_state",
        "description": "SVID interrupt line, open drain; route between VCLK and VDIO to prevent cross-talk."
      },
      {
        "number": "20",
        "name": "VDIO",
        "type": "bidirectional",
        "description": "SVID digital I/O line; 1-V logic level."
      },
      {
        "number": "21",
        "name": "VR_HOT",
        "type": "tri_state",
        "description": "IMVP-7 thermal flag open drain output - active low; typically pulled up to 1-V logic level through 56 \u03a9; fall time < 100 ns; 1-ms de-glitch."
      },
      {
        "number": "22",
        "name": "SLEWA",
        "type": "input",
        "description": "Voltage at start-up sets 1 of 7 slew rates for both converters; slow rate is SLEWRATE/4; soft-start and soft-stop rates are SLEWRATE/8; latched at start-up; tie to GND to disable SCLK timer."
      },
      {
        "number": "23",
        "name": "GPGOOD",
        "type": "tri_state",
        "description": "IMVP-7_PWRGD output for the GPU converter; open-drain."
      },
      {
        "number": "24",
        "name": "GF-IMAX",
        "type": "input",
        "description": "Voltage divider to VREF; resistor to GND sets operating frequency of GPU converter; voltage level sets maximum operating current as VIMAX = VREF \u00d7 IMAX / 255; latched at start-up."
      },
      {
        "number": "25",
        "name": "GGFB",
        "type": "input",
        "description": "Voltage sense return tied for the GPU converter; tie to GND with 10-\u03a9 resistor to close feedback when microprocessor is not in the socket."
      },
      {
        "number": "26",
        "name": "GVFB",
        "type": "input",
        "description": "Voltage sense line tied directly to VGFX of the GPU converter; soft-stop transistor is on this pin; tie to VGFX with 10-\u03a9 resistor to close feedback."
      },
      {
        "number": "27",
        "name": "GCOMP",
        "type": "output",
        "description": "Output of gM error amplifier for the GPU converter; resistor to VREF sets the droop gain."
      },
      {
        "number": "28",
        "name": "GCSN",
        "type": "input",
        "description": "Negative current sense input for GPU converter; connect to most negative node of current sense resistor or inductor DCR sense network; has secondary OVP comparator and soft-stop pull-down transistor."
      },
      {
        "number": "29",
        "name": "GCSP",
        "type": "input",
        "description": "Positive current sense input for GPU converter; connect to most positive node of current sense resistor or inductor DCR sense network; tie to V3R3 to disable GPU converter."
      },
      {
        "number": "30",
        "name": "GIMON",
        "type": "output",
        "description": "Analog current monitor output for the GPU converter; connect 220-nF capacitor to GND for stability."
      },
      {
        "number": "31",
        "name": "GOCP-I",
        "type": "input",
        "description": "Voltage divider to GIMON; resistor ratio sets IMON gain; resistor to GND (RGOCP) selects 1 of 8 OCP levels for GPU converter."
      },
      {
        "number": "32",
        "name": "GTHERM",
        "type": "bidirectional",
        "description": "Thermal sensor input for GPU converter; resistor connected to VREF forms a divider with NTC thermistor connected to GND."
      },
      {
        "number": "33",
        "name": "GSKIP",
        "type": "output",
        "description": "Skip mode control of external driver for GPU converter; 5-V logic level; logic HI = FCCM, LO = SKIP; resistor to GND selects 1 of 8 OSR/USR levels."
      },
      {
        "number": "34",
        "name": "GPWM",
        "type": "output",
        "description": "PWM control for external driver; 5-V logic level."
      },
      {
        "number": "35",
        "name": "CSKIP",
        "type": "output",
        "description": "Skip mode control of external driver for CPU converter; logic HI = FCCM, LO = SKIP; resistor to GND selects 1 of 8 OSR/USR levels; 0.1 V < VCSKIP < 0.3 V at start-up turns OSR off."
      },
      {
        "number": "36",
        "name": "CPWM3",
        "type": "output",
        "description": "PWM control for external driver CPU phase 3; 5V logic level."
      },
      {
        "number": "37",
        "name": "VBAT",
        "type": "power_in",
        "description": "Provides VBAT information to on-time circuits for both converters; 10-k\u03a9 series resistor protects adjacent pins from inadvertent shorts due to solder bridges or mis-probing."
      },
      {
        "number": "38",
        "name": "CDH2",
        "type": "output",
        "description": "Top N-channel FET gate drive output for CPU phase 2."
      },
      {
        "number": "39",
        "name": "CBST2",
        "type": "input",
        "description": "Top N-channel FET bootstrap voltage input for CPU phase 2."
      },
      {
        "number": "40",
        "name": "CSW2",
        "type": "bidirectional",
        "description": "Top N-channel FET gate drive return for CPU phase 2; connects to switched node and bootstrap network."
      },
      {
        "number": "41",
        "name": "CDL2",
        "type": "output",
        "description": "Synchronous N-channel FET gate drive output for CPU phase 2."
      },
      {
        "number": "42",
        "name": "PGND",
        "type": "power_in",
        "description": "Synchronous N-channel FET gate drive return; gate driver ground; connect directly to gate driver decoupling capacitor ground terminal."
      },
      {
        "number": "43",
        "name": "V5DRV",
        "type": "power_in",
        "description": "Power input for gate drivers; connected with external resistor to V5F; decouple with \u22652.2 \u00b5F ceramic capacitor."
      },
      {
        "number": "44",
        "name": "CDL1",
        "type": "output",
        "description": "Synchronous N-channel FET gate drive output for CPU phase 1."
      },
      {
        "number": "45",
        "name": "CSW1",
        "type": "bidirectional",
        "description": "Top N-channel FET gate drive return for CPU phase 1; connects to switched node and bootstrap network."
      },
      {
        "number": "46",
        "name": "CBST1",
        "type": "input",
        "description": "Top N-channel FET bootstrap voltage input for CPU phase 1."
      },
      {
        "number": "47",
        "name": "CDH1",
        "type": "output",
        "description": "Top N-channel FET gate drive output for CPU phase 1."
      },
      {
        "number": "48",
        "name": "V5",
        "type": "power_in",
        "description": "5-V power input for analog circuits; connect through resistor to 5-V plane and bypass to GND with \u22651 \u00b5F ceramic capacitor."
      },
      {
        "number": "49",
        "name": "EP",
        "type": "passive",
        "description": "Exposed pad (from the footprint; not named in the datasheet pin table)."
      }
    ],
    "provenance": {
      "extractor": "extract_pins 0.2",
      "factory_chain": {
        "factory": "2.0.0",
        "extractor": "extract_pins 0.2",
        "primary_model": "claude-haiku-4-5-20251001",
        "primary_mode": "text",
        "consensus_model": "claude-sonnet-4-6",
        "consensus": "agreed",
        "guards": "pin_guards 0.1: passed",
        "guard_notes": [
          "extractor flagged: Thermal pad (PAD) is listed as GND but is not a numbered pin; it is the bottom thermal pad of the 6x"
        ],
        "pages_sent": 53,
        "cost_usd": 1.2743,
        "at": "2026-10-01T18:05:14"
      },
      "datasheet": {
        "url": "https://www.ti.com/cn/lit/gpn/tps51640a",
        "pages": 53,
        "sha256": "1e89e7957ab9138c",
        "source_tier": "lcsc"
      },
      "cad": "KiCad official (CC-BY-SA 4.0)",
      "pins": {
        "total": 49,
        "described": 49,
        "cites_pages": true,
        "refuses_to_fabricate": true
      }
    },
    "viewers": {
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}