component
TPS563210ADDFT
Public Made by Adomby adom
Texas Instruments DC-DC Converters, TSOT-23-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
Generated by kicad-footprint-generator · KiCad file format 20260206
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TPS563210ADDFT
Texas Instruments · DC-DC Converters · TSOT-23-8
TPS563210ADDFT from Texas Instruments, in a TSOT-23-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | GND | power_in | Ground pin, source terminal of the low-side power NFET and ground terminal for the controller circuit; connect sensitive VFB to this GND at a single point. |
| 2 | SW | passive | Switch node connection between the high-side NFET and low-side NFET (absolute max -2 V to 19 V). |
| 3 | VIN | power_in | Input voltage supply pin and drain terminal of the high-side power NFET; recommended range 4.5 V to 17 V. |
| 4 | PG | output | Power good open-drain output. |
| 5 | SS | passive | Soft-start control pin; an external capacitor should be connected to GND. |
| 6 | VFB | input | Converter feedback input; connect to the output voltage with a feedback resistor divider. |
| 7 | EN | input | Enable input control, active high, and must be pulled up to enable the device. |
| 8 | VBST | power_in | Supply input for the high-side NFET gate drive circuit; connect a 0.1 µF capacitor between VBST and SW pins. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | TSOT-23-8 |
| Category | Power Supply Chip |
| Pins | 8 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Operating non-switching supply current | IVIN | 190 | 290 | µA | VIN current, TA = 25°C, EN = 5V, VFB = 0.8 V | 5 | |
| Shutdown supply current | IVINSDN | 3 | 10 | µA | VIN current, TA = 25°C, EN = 0 V | 5 | |
| EN high-level input voltage | VENH | 1.6 | V | EN | 5 | ||
| EN low-level input voltage | VENL | 0.6 | V | EN | 5 | ||
| EN pin resistance to GND | REN | 225 | 450 | 900 | kΩ | VEN = 12 V | 5 |
| VFB threshold voltage | VFBTH | 758 | 765 | 772 | mV | TA = 25°C, VO = 1.05 V | 5 |
| VFB threshold voltage | VFBTH | 753 | 777 | mV | TA = 0°C to 85°C, VO = 1.05 V (not production tested) | 5 | |
| VFB threshold voltage | VFBTH | 751 | 779 | mV | TA = -40°C to 85°C, VO = 1.05 V (not production tested) | 5 | |
| VFB input current | IVFB | 0 | 0.1 | µA | VFB = 0.8 V, TA = 25°C | 5 | |
| High side switch resistance | RDS(on)h | 68 | mΩ | TA = 25°C, VBST, SW = 5.5 V, TPS563210A | 5 | ||
| Low side switch resistance | RDS(on)l | 39 | mΩ | TA = 25°C, TPS563210A | 5 | ||
| Current limit | IOCL | 3.5 | 4.2 | 5.3 | A | DC current, VOUT = 1.05 V, L1 = 1.5 µH, TPS563210A | 5 |
| SS charge current | ISS | 4.2 | 6 | 7.8 | µA | VSS = 1.2 V | 5 |
| PG threshold rising | VTHPG | 85 | 90 | 95 | % | VFB rising (Good) | 5 |
| PG sink current | IPG | 0.5 | 1 | mA | PG = 0.5 V | 5 | |
| UVLO wake up threshold | UVLO | 3.45 | 3.75 | 4.05 | V | Wake up VIN voltage | 5 |
| UVLO hysteresis | UVLO | 0.13 | 0.32 | 0.55 | V | Hysteresis VIN voltage | 5 |
| Minimum off time | tOFF(MIN) | 260 | 310 | ns | TA = 25°C, VFB = 0.5 V | 5 | |
| On time | tON | 150 | ns | VIN = 12 V, VO = 1.05 V | 5 | ||
| Thermal shutdown threshold | TSDN | 155 | °C | Shutdown temperature | 5 | ||
| Thermal shutdown hysteresis | TSDN | 35 | °C | Hysteresis | 5 | ||
| Supply input voltage range | VIN | 4.5 | 17 | V | TJ = -40°C to 150°C | 4 | |
| VBST input voltage | VBST | -0.1 | 23 | V | 4 | ||
| VBST (vs SW) input voltage | VBST(vs SW) | -0.1 | 6 | V | 4 | ||
| EN input voltage | EN | -0.1 | 17 | V | 4 | ||
| VFB, PG input voltage | VFB, PG | -0.1 | 5.5 | V | 4 | ||
| SS input voltage | SS | -0.1 | 5 | V | 4 | ||
| SW input voltage | SW | -1.8 | 17 | V | 4 | ||
| Operating free-air temperature | TA | -40 | 85 | °C | 4 | ||
| VIN, EN input voltage | VIN, EN | -0.3 | 19 | V | TJ = -40°C to 150°C | 4 | |
| VBST voltage | VBST | -0.3 | 25 | V | 4 | ||
| VBST (10 ns transient) | VBST | -0.3 | 27.5 | V | 10 ns transient | 4 | |
| VBST (vs SW) | VBST | -0.3 | 6.5 | V | vs SW | 4 | |
| VFB, PG voltage | VFB, PG | -0.3 | 6.5 | V | 4 | ||
| SS voltage | SS | -0.3 | 5.5 | V | 4 | ||
| SW voltage | SW | -2 | 19 | V | 4 | ||
| SW (10 ns transient) | SW | -3.5 | 21 | V | 10 ns transient | 4 | |
| Operating junction temperature | TJ | -40 | 150 | °C | 4 | ||
| Storage temperature | Tstg | -55 | 150 | °C | 4 | ||
| ESD HBM | V(ESD) | -2000 | 2000 | V | Human body model, ANSI/ESDA/JEDEC JS-001 | 4 | |
| ESD CDM | V(ESD) | -500 | 500 | V | Charged device model, JESD22-C101 | 4 | |
| Junction-to-ambient thermal resistance | RθJA | 87 | °C/W | DDF (8 pins) | 4 | ||
| Junction-to-case (top) thermal resistance | RθJC(top) | 41.6 | °C/W | DDF (8 pins) | 4 | ||
| Junction-to-board thermal resistance | RθJB | 14.6 | °C/W | DDF (8 pins) | 4 | ||
| Junction-to-top characterization parameter | ψJT | 4.7 | °C/W | DDF (8 pins) | 4 | ||
| Junction-to-board characterization parameter | ψJB | 14.6 | °C/W | DDF (8 pins) | 4 |
CAD (KiCad official)
- Symbol:
TPS563210ADDFT - Footprint:
Package_TO_SOT_SMD:TSOT-23-8 - 3D model: TSOT-23-8 (KiCad packages3D, STEP)
- 3D model files:
tps563210addft-etched.step/tps563210addft-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);tps563210addft.step/tps563210addft.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (29 pp, sha256
93ccf335d18255b9, retrieved 2026-10-23, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).