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Generated by kicad-footprint-generator · KiCad file format 20260206
Name Last commit message Last updated
docs tps562200ddcr: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 2d ago
viewers pin 1: carry the footprint's marker into the .lbr, the viewer and page.json (silk-marker, drawn, top-left) · Ray 1mo ago
package.json Publish 0.2.0 · Ray 1mo ago
pads.json pin 1: carry the footprint's marker into the .lbr, the viewer and page.json (silk-marker, drawn, top-left) · Ray 1mo ago
page.json Brief states the pinout check that actually ran (was an unconditional "Datasheet-verified pinout") · Ray 10d ago
README.md tps562200ddcr: laser-etched CAD + chip hero (factory 2.0.0 backfill) · Ray 16d ago
tps562200ddcr-etched.fit.json tps562200ddcr: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 2d ago
tps562200ddcr-etched.glb tps562200ddcr: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 2d ago
tps562200ddcr-etched.step tps562200ddcr: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 2d ago
tps562200ddcr.glb Publish 0.1.0 · Ray 1mo ago
tps562200ddcr.kicad_mod Publish 0.1.0 · Ray 1mo ago
tps562200ddcr.kicad_sym Publish 0.1.0 · Ray 1mo ago
tps562200ddcr.lbr rebuild the library on adom-lbr 2.32.0. The published copy was built by 2.18.0, which imported every KiCad roundrect and oval pad as a SQUARE EAGLE smd; this carries the real pad shape across (0 -> 6 rounded pads) and stops dropping geometry drawn on KiCad User.N layers. Attributes, connects, pads and the pin-1 marker are gated against decreasing and are unchanged. · Ray 1mo ago
tps562200ddcr.step Publish 0.1.0 · Ray 1mo ago

TPS562200DDCR

Texas Instruments · DC-DC Converters · SOT-23-6

TPS562200DDCR from Texas Instruments, in a SOT-23-6. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 GND power_in Ground pin. Source terminal of the low-side power NFET and the ground return for the internal controller circuit. Connect the sensitive VFB divider ground to this pin at a single point (Kelvin) to avoid switching-current offset errors.
2 SW power_out Switch node connection between the internal high-side and low-side NFETs. Connect to the output inductor. Absolute maximum -2 V to 19 V (-3.5 V to 21 V for 10 ns transients).
3 VIN power_in Input voltage supply pin and drain of the high-side power NFET. Operating range 4.5 V to 17 V; absolute maximum 19 V. Bypass to GND with a low-ESR ceramic input capacitor placed close to the pin.
4 VFB input Converter feedback input to the internal 0.765 V (typ) reference comparator. Connect to the output through a resistor divider to set the regulated output voltage (0.76 V to 7 V). Input current is essentially 0 (±0.1 µA max).
5 EN input Enable input, active high. VIH >= 1.6 V enables the converter; VIL <= 0.6 V disables it. Has an internal ~450 kΩ pull-down to GND (225-900 kΩ). Must be pulled high to enable the device; do not leave floating.
6 VBST power_in Bootstrap supply input for the high-side NFET gate drive. Connect a 0.1 µF ceramic capacitor between VBST and SW. Absolute maximum 25 V to GND and 6.5 V with respect to SW.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package SOT-23-6
Category PMIC
Pins 6

Ordering variants

Same part, different packaging or reel option.

  • TPS562200DDCR
  • TPS562200DDCRDDCT

CAD (KiCad official)

  • Symbol: TPS562200DDCR
  • Footprint: Package_TO_SOT_SMD:SOT-23-6
  • 3D model: SOT-23-6 (KiCad packages3D, STEP)
  • 3D model files: tps562200ddcr-etched.step / tps562200ddcr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tps562200ddcr.step / tps562200ddcr.glb are the bare package body.

3D model downloads

Two STEP files. Same geometry, different body top:

File Size Use it when
tps562200ddcr.step 97 KB You want the bare part, or you mark your own boards.
tps562200ddcr-etched.step 2.8 MB You want the part with TPS562200DDCR already on it.

The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 652 faces against 117 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (28 pp, sha256 5cdbb6cdb9b351a8, retrieved 2026-08-17, tier: manufacturer)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF