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Ray tps55340rtet: specified limits as data (metadata.characteristics, 39 rows from the datasheet) 0680ad3 25d ago

TPS55340RTET

Texas Instruments · DC-DC Converters · WQFN-16-EP(3x3)

TPS55340RTET from Texas Instruments, in a WQFN-16-EP(3x3). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 SW passive Drain of the internal power MOSFET switch; connect to the switched side of the boost or SEPIC inductor or the flyback transformer.
2 VIN power_in Input supply pin to the IC; connect to a supply voltage between 2.9 V and 32 V, which may differ from the boost power stage input.
3 EN input Enable pin; when the voltage on this pin falls below the enable threshold for more than 1 ms, the IC turns off.
4 SS passive Soft-start programming pin; a capacitor between SS and AGND programs the soft-start timing.
5 SYNC input Switching frequency synchronization pin; an external clock signal can set the switching frequency between 200 kHz and 1.0 MHz, otherwise tie to AGND.
6 AGND power_in Signal ground of the IC.
7 COMP output Output of the transconductance error amplifier; an external RC network connected to this pin compensates the regulator feedback loop.
8 FB input Error amplifier input and feedback pin for positive voltage regulation; connect to the center tap of a resistor divider to program the output voltage.
9 FREQ passive Switching frequency program pin; an external resistor connected between FREQ and AGND sets the switching frequency.
10 NC unconnected Reserved pin that must be connected to ground (TI recommends connecting NC to AGND).
11 PGND power_in Power ground of the IC; connected to the source of the internal power MOSFET switch.
12 PGND power_in Power ground of the IC; connected to the source of the internal power MOSFET switch.
13 PGND power_in Power ground of the IC; connected to the source of the internal power MOSFET switch.
14 NC unconnected Reserved pin that must be connected to ground (TI recommends connecting NC to AGND).
15 SW passive Drain of the internal power MOSFET switch; connect to the switched side of the boost or SEPIC inductor or the flyback transformer.
16 SW passive Drain of the internal power MOSFET switch; connect to the switched side of the boost or SEPIC inductor or the flyback transformer.
17 PowerPAD power_in Exposed thermal pad; should be soldered to AGND, and thermal vias to an internal ground plane are recommended for improved power dissipation.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package WQFN-16-EP(3x3)
Category Power Management (PMIC)
Pins 17

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Supply voltages on pin VIN -0.3 34 V Referenced to network ground terminal 4
Voltage on pin EN -0.3 34 V Referenced to network ground terminal 4
Voltage on pins FB, FREQ, and COMP -0.3 3 V Referenced to network ground terminal 4
Voltage on pin SS -0.3 5 V Referenced to network ground terminal 4
Voltage on pin SYNC -0.3 7 V Referenced to network ground terminal 4
Voltage on pin SW -0.3 40 V Referenced to network ground terminal 4
Operating junction temperature -40 150 °C Over operating temperature range 4
Storage temperature Tstg -65 150 °C 4
VIN Input voltage range VIN 2.9 32 V 4
Output voltage range VOUT 38 V 4
EN voltage range VEN 0 32 V 4
External switching frequency logic input range VSYN 0 5 V 4
Operating free-air temperature TA -40 125 °C 4
Operating junction temperature TJ -40 150 °C 4
VIN Input voltage range VIN 2.9 32 V 5
Operating quiescent current into VIN IQ 0.5 mA Device nonswitching, VFB = 2 V 5
Shutdown current ISD 2.7 10 µA EN = GND 5
Undervoltage lockout threshold VUVLO 2.5 2.7 V VIN falling 5
Undervoltage lockout hysteresis Vhys 120 140 160 mV 5
EN threshold voltage (rising) VEN 0.9 1.08 1.3 V EN rising input 5
EN threshold voltage (falling) VEN 0.74 0.92 1.125 V EN falling input 5
EN pulldown resistor REN 400 950 1600 kΩ 5
Voltage feedback regulation voltage VREF 1.204 1.229 1.254 V 5
Voltage feedback regulation voltage VREF 1.22 1.229 1.238 V TA = 25°C 5
Voltage feedback input bias current IFB 1.6 20 nA TA = 25°C 5
Error amplifier transconductance Gea 240 360 440 µS 5
Frequency fSW 75 94 130 kHz RFREQ = 480 kΩ 5
Frequency fSW 460 577 740 kHz FREQ = 80 kΩ 5
Frequency fSW 920 1140 1480 kHz RFREQ = 40 kΩ 5
Maximum duty cycle Dmax 89 96 % VFB = 1.0 V, RFREQ = 80 kΩ 5
N-channel MOSFET on-resistance RDS(ON) 60 110 mΩ VIN = 5 V 5
N-channel MOSFET on-resistance RDS(ON) 70 120 mΩ VIN = 3 V 5
N-channel MOSFET current limit ILIM 5.25 6.6 7.75 A D = Dmax 5
Junction-to-ambient thermal resistance (QFN, 16 pins) RθJA 43.3 °C/W 4
Junction-to-case (top) thermal resistance (QFN, 16 pins) RθJC(top) 38.7 °C/W 4
Junction-to-board thermal resistance (QFN, 16 pins) RθJB 14.5 °C/W 4
Junction-to-top characterization parameter (QFN, 16 pins) ψJT 0.4 °C/W 4
Junction-to-board characterization parameter (QFN, 16 pins) ψJB 14.5 °C/W 4
Junction-to-case (bottom) thermal resistance (QFN, 16 pins) RθJC(bot) 3.5 °C/W 4

CAD (KiCad official)

  • Symbol: TPS55340RTET
  • Footprint: Package_DFN_QFN:QFN-16-1EP_3x3mm_P0.5mm_EP1.7x1.7mm
  • 3D model: WQFN-16-EP(3x3) (KiCad packages3D, STEP)
  • 3D model files: tps55340rtet-etched.step / tps55340rtet-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tps55340rtet.step / tps55340rtet.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (45 pp, sha256 05e4069b78ee3f03, retrieved 2026-09-24, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: parts-factory 2.0.0 / extract_pins 0.2, primary claude-haiku-4-5-20251001 (text), consensus claude-sonnet-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF