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Contents

README

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TPS54626PWPR

Texas Instruments · DC-DC Converters · HTSSOP-14-EP

TPS54626PWPR from Texas Instruments, in a HTSSOP-14-EP. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VO power_out Connect to output of converter; also used for the output discharge function.
2 VFB input Converter feedback input; connect with a feedback resistor divider from VO.
3 VREG5 power_out 5.5V internal linear regulator output for control circuitry; a typical 1uF capacitor should be connected to GND; not active when EN is low.
4 SS passive Soft-start control pin; an external capacitor connected to GND sets the soft-start ramp time (6uA typical charge current).
5 GND power_in Signal ground pin for the control circuitry.
6 PG output Open-drain power-good output; requires an external pull-up resistor (25k-150kOhm) to VREG5.
7 EN input Enable control input, active high; must be pulled up to enable the device (internal pull-down resistance to GND of 200-800kOhm).
8 PGND1 power_in Ground return for the low-side MOSFET; also serves as an input to the current comparator; connect strongly to GND near the IC.
9 PGND2 power_in Ground return for the low-side MOSFET; also serves as an input to the current comparator; connect strongly to GND near the IC.
10 SW1 output Switch node connection between the high-side and low-side NFETs; also serves as an input to the current comparator.
11 SW2 output Switch node connection between the high-side and low-side NFETs; also serves as an input to the current comparator.
12 VBST passive Supply input for the high-side NFET gate driver (boost terminal); connect a capacitor from this pin to the SW1/SW2 terminals; an internal PN diode connects VREG5 to this pin.
13 VIN1 power_in Power input, connected to the high-side NFET drain.
14 VIN2 power_in Power input, connected to the high-side NFET drain; an additional 0.1uF capacitor from this pin to ground is recommended to improve stability of the over-current limit function.
15 PowerPAD power_in Exposed thermal pad on the package backside, internally connected to PGND; must be soldered to the PCB ground plane to achieve appropriate power dissipation.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package HTSSOP-14-EP
Category Power Supply Chip
Pins 15

CAD (KiCad official)

  • Symbol: TPS54626PWPR
  • Footprint: Package_SO:TSSOP-14-1EP_4.4x5mm_P0.65mm
  • 3D model: HTSSOP-14-EP (KiCad packages3D, STEP)
  • 3D model files: tps54626pwpr-etched.step / tps54626pwpr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tps54626pwpr.step / tps54626pwpr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (23 pp, sha256 6a77b8bc07cb116a, retrieved 2026-09-23, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: parts-factory 2.0.0 / extract_pins 0.2, primary claude-haiku-4-5-20251001 (text), consensus claude-sonnet-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF