TPS54290PWPR

{
  "slug": "tps54290pwpr",
  "version": "0.1.0",
  "type": "component",
  "description": "Texas Instruments DC-DC Converters, HTSSOP-16-EP. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
  "tags": [
    "component",
    "power management (pmic)",
    "tps54290pwpr",
    "factory-2.0.0",
    "extractor-text"
  ],
  "dependencies": {},
  "hero": {
    "type": "image",
    "path": "docs/hero.png"
  },
  "files": [
    "page.json",
    "README.md",
    "tps54290pwpr.kicad_sym",
    "tps54290pwpr.kicad_mod",
    "tps54290pwpr.glb",
    "tps54290pwpr.step",
    "tps54290pwpr.lbr",
    "docs/hero.png",
    "docs/tps54290pwpr-datasheet.pdf",
    "viewers/symbol.html",
    "viewers/footprint.html",
    "tps54290pwpr-hero.glb",
    "tps54290pwpr-hero.overlay.json"
  ],
  "component": {
    "mpn": "TPS54290PWPR",
    "manufacturer": "Texas Instruments",
    "package": "HTSSOP-16-EP",
    "pin_count": 17,
    "category": "Power Management (PMIC)",
    "subcategory": "DC-DC Converters",
    "datasheet": "https://www.ti.com/cn/lit/gpn/tps54291",
    "parts": {
      "symbol": "tps54290pwpr.kicad_sym",
      "footprint": "tps54290pwpr.kicad_mod",
      "model_3d": "tps54290pwpr-hero.glb",
      "model_3d_plain": "tps54290pwpr.glb",
      "model_3d_step": "tps54290pwpr-etched.step",
      "model_3d_step_plain": "tps54290pwpr.step",
      "lbr": "tps54290pwpr.lbr"
    },
    "distributor_links": {
      "lcsc": "C2872397",
      "digikey": "296-25433-2-ND",
      "mouser": "595-TPS54290PWPR"
    },
    "distributor_check": {
      "checked_at": "2026-10-08T17:05:37Z",
      "source": "Component Ocean /api/assign-pns",
      "digikey": {
        "pn": "296-25433-2-ND",
        "status": "found",
        "lifecycle": "Active"
      },
      "mouser": {
        "pn": "595-TPS54290PWPR",
        "status": "found"
      }
    },
    "pins": [
      {
        "number": "1",
        "name": "PVDD1",
        "type": "power_in",
        "description": "Power input to the Output1 high-side MOSFET only; it must be locally bypassed to PGND1 with a low-ESR ceramic capacitor of 10 µF or greater, and may be tied externally to PVDD2."
      },
      {
        "number": "2",
        "name": "BOOT1",
        "type": "input",
        "description": "Input supply to the Output1 high-side gate driver; connect a 22-nF to 68-nF capacitor from this pin to SW1, optionally with a 2 Ω to 5 Ω series resistor to slow the turn-on."
      },
      {
        "number": "3",
        "name": "SW1",
        "type": "output",
        "description": "Source (switching) output for the Output1 PWM."
      },
      {
        "number": "4",
        "name": "PGND1",
        "type": "power_in",
        "description": "Power ground for Output1, separated from GND to keep switching noise out of the internal logic circuits."
      },
      {
        "number": "5",
        "name": "EN1",
        "type": "input",
        "description": "Active-low enable for Output1: above 1.5 V disables Output1, below 0.9 V enables it and starts soft start, and it is pulled to PVDD2 by an internal current source if left floating; connect to GND to bypass the enable function."
      },
      {
        "number": "6",
        "name": "EN2",
        "type": "input",
        "description": "Active-low enable for Output2: above 1.5 V disables Output2, below 0.9 V enables it and starts soft start, and it is pulled to PVDD2 by an internal current source if left floating; connect to GND to bypass the enable function."
      },
      {
        "number": "7",
        "name": "FB1",
        "type": "input",
        "description": "Output1 voltage feedback; the internal gM error amplifier regulates this pin to the internal 0.8-V reference, set by an external resistor divider from VOUT1."
      },
      {
        "number": "8",
        "name": "COMP1",
        "type": "output",
        "description": "Output of the Output1 transconductance (gM) error amplifier; an R-C compensation network is connected from this pin to GND."
      },
      {
        "number": "9",
        "name": "COMP2",
        "type": "output",
        "description": "Output of the Output2 transconductance (gM) error amplifier; an R-C compensation network is connected from this pin to GND."
      },
      {
        "number": "10",
        "name": "FB2",
        "type": "input",
        "description": "Output2 voltage feedback; the internal gM error amplifier regulates this pin to the internal 0.8-V reference, set by an external resistor divider from VOUT2."
      },
      {
        "number": "11",
        "name": "GND",
        "type": "power_in",
        "description": "Analog ground pin for the device."
      },
      {
        "number": "12",
        "name": "BP",
        "type": "power_out",
        "description": "Regulated voltage that charges the bootstrap capacitors; bypass to GND with a low-ESR 4.7-µF ceramic capacitor (10 µF preferred)."
      },
      {
        "number": "13",
        "name": "PGND2",
        "type": "power_in",
        "description": "Power ground for Output2, separated from GND to keep switching noise out of the internal logic circuits."
      },
      {
        "number": "14",
        "name": "SW2",
        "type": "output",
        "description": "Source (switching) output for the Output2 PWM."
      },
      {
        "number": "15",
        "name": "BOOT2",
        "type": "input",
        "description": "Input supply to the Output2 high-side gate driver; connect a 22-nF to 68-nF capacitor from this pin to SW2, optionally with a 2 Ω to 5 Ω series resistor to slow the turn-on."
      },
      {
        "number": "16",
        "name": "PVDD2",
        "type": "power_in",
        "description": "Supplies the control circuitry, the EN1/EN2 pull-ups and the Output2 high-side MOSFET; it must be bypassed to PGND2 with at least 10 µF low-ESR ceramic, and UVLO enables the device when PVDD2 exceeds 4.2 V."
      },
      {
        "number": "17",
        "name": "Thermal Pad",
        "type": "passive",
        "description": "Exposed pad (from the footprint; not named in the datasheet pin table)."
      }
    ],
    "provenance": {
      "extractor": "extract_pins 0.3",
      "factory_chain": {
        "factory": "2.0.0",
        "extractor": "extract_pins 0.3",
        "primary_model": "claude-haiku-5-5",
        "primary_mode": "text",
        "consensus_model": "claude-sonnet-5-5",
        "consensus": "agreed",
        "guards": "pin_guards 0.1: passed",
        "guard_notes": [
          "extractor flagged: The exposed thermal pad is listed in the datasheet as 'Thermal Pad' with no pin number. It is not in; Pin types were taken from the datasheet I/O column and mapped to KiCad classes. PVDD1, PVDD2, PGND1,; The package is confirmed as the 16-pin PWP HTSSOP (PowerPAD) by the orderable addendum on page 31 fo",
          "exposed pad 17 added from the footprint"
        ],
        "pages_sent": 9,
        "cost_usd": 0.0655,
        "at": "2026-10-08T17:05:12"
      },
      "datasheet": {
        "url": "https://www.ti.com/cn/lit/gpn/tps54291",
        "pages": 40,
        "sha256": "9b88a4b17358c967",
        "source_tier": "lcsc"
      },
      "cad": "KiCad official (CC-BY-SA 4.0)",
      "pins": {
        "total": 17,
        "described": 17,
        "cites_pages": true,
        "refuses_to_fabricate": true
      }
    },
    "viewers": {
      "symbol": "viewers/symbol.html",
      "footprint": "viewers/footprint.html"
    },
    "models_3d": [
      {
        "file": "tps54290pwpr.step",
        "role": "plain",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          6.4,
          5.0,
          1.1
        ],
        "zmin_mm": -0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "7982746831c0bd23f4690608869ad67776faae5c762fb0376666126a3998921b",
        "checked": "2026-10-08",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      },
      {
        "file": "tps54290pwpr-etched.step",
        "role": "eda",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          6.4,
          5.0,
          1.1
        ],
        "zmin_mm": -0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "d6c1378c08a72af73efe4dcd8046be16b885225bd3f0c440bbc63371648dbc06",
        "checked": "2026-10-08",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      }
    ]
  }
}