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Contents

README

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TPS54225PWPR

Texas Instruments · DC-DC Converters · HTSSOP-14

TPS54225PWPR from Texas Instruments, in a HTSSOP-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VO input Connect to output of converter; this pin is used for On-Time Adjustment.
2 VFB input Converter feedback input; connect with feedback resistor divider.
3 VREG5 power_out 5.5 V internal power supply output; a capacitor (typical 1 uF) should be connected to GND.
4 SS passive Soft-start control pin; an external capacitor should be connected to GND to set the slow-start time.
5 GND power_in Signal ground pin.
6 PG output Open drain power good output.
7 EN input Enable control input.
8 PGND1 power_in Ground return for low-side MOSFET; also serves as input of a current comparator, and should be connected strongly together with PGND near the IC.
9 PGND2 power_in Ground return for low-side MOSFET; also serves as input of a current comparator, and should be connected strongly together with PGND near the IC.
10 SW1 output Switch node connection between high-side NFET and low-side NFET; also serves as an input to a current comparator.
11 SW2 output Switch node connection between high-side NFET and low-side NFET; also serves as an input to a current comparator.
12 VBST power_in Supply input for the high-side NFET gate driver (boost terminal); a capacitor should be connected from this pin to the respective SW1, SW2 terminals, and an internal PN diode connects VREG5 to this pin.
13 VIN power_in Power input, connected to the high-side NFET drain.
14 VCC power_in Supply input for the 5 V internal linear regulator that powers the control circuitry.
15 PowerPAD power_in Thermal pad of the package (back side); must be soldered to achieve appropriate dissipation and should be connected to PGND.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package HTSSOP-14
Category Power Management (PMIC)
Pins 15

CAD (KiCad official)

  • Symbol: TPS54225PWPR
  • Footprint: Package_SO:TSSOP-14-1EP_4.4x5mm_P0.65mm
  • 3D model: HTSSOP-14 (KiCad packages3D, STEP)
  • 3D model files: tps54225pwpr-etched.step / tps54225pwpr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tps54225pwpr.step / tps54225pwpr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (29 pp, sha256 3c3ac317d4ab1b65, retrieved 2026-09-24, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.2, primary claude-haiku-4-5-20251001 (text), consensus claude-sonnet-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF