component
TPS53667RTAR
Public Made by Adomby adom
Texas Instruments DC-DC Controllers, WQFN-40-EP(6x6). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
main
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{
"slug": "tps53667rtar",
"version": "0.1.0",
"type": "component",
"description": "Texas Instruments DC-DC Controllers, WQFN-40-EP(6x6). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
"tags": [
"component",
"power management ics",
"tps53667rtar",
"factory-2.0.0",
"extractor-text"
],
"dependencies": {},
"hero": {
"type": "image",
"path": "docs/hero.png"
},
"files": [
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"README.md",
"tps53667rtar.kicad_sym",
"tps53667rtar.kicad_mod",
"tps53667rtar.glb",
"tps53667rtar.step",
"tps53667rtar.lbr",
"docs/hero.png",
"docs/tps53667rtar-datasheet.pdf",
"viewers/symbol.html",
"viewers/footprint.html",
"tps53667rtar-hero.glb",
"tps53667rtar-hero.overlay.json",
"tps53667rtar-etched.glb"
],
"component": {
"mpn": "TPS53667RTAR",
"manufacturer": "Texas Instruments",
"package": "WQFN-40-EP(6x6)",
"pin_count": 41,
"category": "Power Management ICs",
"subcategory": "DC-DC Controllers",
"datasheet": "https://www.ti.com/cn/lit/gpn/tps53667",
"parts": {
"symbol": "tps53667rtar.kicad_sym",
"footprint": "tps53667rtar.kicad_mod",
"model_3d": "tps53667rtar-hero.glb",
"model_3d_plain": "tps53667rtar-etched.glb",
"model_3d_step": "tps53667rtar-etched.step",
"model_3d_step_plain": "tps53667rtar.step",
"lbr": "tps53667rtar.lbr"
},
"distributor_links": {
"lcsc": "C702270",
"digikey": "TPS53667RTAR-ND",
"mouser": "595-TPS53667RTAR"
},
"distributor_check": {
"checked_at": "2026-10-23T09:02:11Z",
"source": "Component Ocean /api/assign-pns",
"digikey": {
"pn": "TPS53667RTAR-ND",
"status": "found",
"lifecycle": "Active"
},
"mouser": {
"pn": "595-TPS53667RTAR",
"status": "found"
}
},
"pins": [
{
"number": "1",
"name": "OCL-R",
"type": "input",
"description": "A resistor to GND and the voltage level select 1 of 16 per-phase OCL levels and one of four RAMP levels, latched when V3R3 powers up."
},
{
"number": "2",
"name": "IMON",
"type": "output",
"description": "Analog current monitor output."
},
{
"number": "3",
"name": "CSP1",
"type": "input",
"description": "Positive current sense input for phase 1; connect to the IOUT pin of TI smart power stages (e.g. CSD9549x)."
},
{
"number": "4",
"name": "CSP2",
"type": "input",
"description": "Positive current sense input for phase 2; tie to V3R3 per Table 3 to disable the phase."
},
{
"number": "5",
"name": "CSP3",
"type": "input",
"description": "Positive current sense input for phase 3; tie to V3R3 per Table 3 to disable the phase."
},
{
"number": "6",
"name": "CSP4",
"type": "input",
"description": "Positive current sense input for phase 4; tie to V3R3 per Table 3 to disable the phase."
},
{
"number": "7",
"name": "CSP5",
"type": "input",
"description": "Positive current sense input for phase 5; tie to V3R3 per Table 3 to disable the phase."
},
{
"number": "8",
"name": "CSP6",
"type": "input",
"description": "Positive current sense input for phase 6; tie to V3R3 per Table 3 to disable the phase."
},
{
"number": "9",
"name": "VSP",
"type": "input",
"description": "Positive input of the remote voltage sense amplifier; connect directly to the load."
},
{
"number": "10",
"name": "VSN",
"type": "input",
"description": "Negative input of the remote voltage sense amplifier; connect directly to the GND of the load."
},
{
"number": "11",
"name": "COMP",
"type": "output",
"description": "Output of the gM error amplifier; resistors and capacitors between this pin and VREF set the compensation."
},
{
"number": "12",
"name": "ISUM",
"type": "output",
"description": "A resistor between this pin and VREF determines the droop."
},
{
"number": "13",
"name": "VREF",
"type": "power_out",
"description": "1.7-V, 500-µA LDO reference voltage; bypass to GND with 0.33 µF ceramic and connect to REFIN of TI smart power stages."
},
{
"number": "14",
"name": "V3R3",
"type": "power_out",
"description": "3.3-V LDO output; bypass to GND with a ceramic capacitor of 1 µF or larger."
},
{
"number": "15",
"name": "V5",
"type": "power_in",
"description": "5-V power input (4.5 V to 5.5 V) powering all internal analog circuits; bypass to GND with 1 µF or larger ceramic capacitor."
},
{
"number": "16",
"name": "VIN",
"type": "power_in",
"description": "Input voltage supply, also used for input voltage sensing for on-time control and input UVLO."
},
{
"number": "17",
"name": "GND",
"type": "power_in",
"description": "Ground pin."
},
{
"number": "18",
"name": "VR_RDY",
"type": "output",
"description": "Open-drain power good output, typically pulled up to V3R3 through 3 kΩ or larger."
},
{
"number": "19",
"name": "VR_HOT",
"type": "output",
"description": "Active-low open-drain thermal flag output, typically pulled up to V3R3 through 3 kΩ or larger; leave floating if not used."
},
{
"number": "20",
"name": "GND",
"type": "power_in",
"description": "Connect this pin to GND; note this is not the IC ground pin."
},
{
"number": "21",
"name": "RESET",
"type": "input",
"description": "Reset pin; if low for more than 1000 ns the controller pulls the output voltage to the VBOOT level."
},
{
"number": "22",
"name": "GND",
"type": "power_in",
"description": "Connect this pin to GND; note this is not the IC ground pin."
},
{
"number": "23",
"name": "ENABLE",
"type": "input",
"description": "VR enable input with 1-V I/O level and 100-ns debounce."
},
{
"number": "24",
"name": "PMB_CLK",
"type": "input",
"description": "I2C PMBus clock, 3.3-V and 1.8-V logic level."
},
{
"number": "25",
"name": "PMB_ALERT",
"type": "output",
"description": "Open-drain I2C PMBus interrupt line, 3.3-V and 1.8-V logic level."
},
{
"number": "26",
"name": "PMB_DIO",
"type": "bidirectional",
"description": "I2C PMBus digital I/O line, 3.3-V and 1.8-V logic level."
},
{
"number": "27",
"name": "VR_FAULT",
"type": "output",
"description": "Open-drain VR fault indicator that is LOW on failure, typically pulled up to V3R3 through 3 kΩ or larger; leave floating if not used."
},
{
"number": "28",
"name": "ADDR-TRISE",
"type": "input",
"description": "Voltage divider to VREF; resistor to GND sets 3 bits (rise slew rate and boot voltage LSB) and the voltage sets the 4-bit PMBus address, latched when V3R3 powers up."
},
{
"number": "29",
"name": "SLEW-MODE",
"type": "input",
"description": "Voltage divider to VREF; resistor to GND sets 1 of 8 slew rates and the voltage sets the operation modes, latched when V3R3 powers up."
},
{
"number": "30",
"name": "O-USR",
"type": "input",
"description": "Voltage divider to VREF; resistor to GND selects 1 of 7 OSR thresholds or OFF and the voltage selects 1 of 7 USR levels or OFF, latched when V3R3 powers up."
},
{
"number": "31",
"name": "VBOOT",
"type": "input",
"description": "Voltage divider to VREF; resistor to GND sets boot VID bits B[3:1] and the voltage sets B[7:4], latched when V3R3 powers up."
},
{
"number": "32",
"name": "F-IMAX",
"type": "input",
"description": "Voltage divider to VREF; resistor to GND sets the operating frequency and the voltage sets IMAX (VVREF × IMAX / 255), latched at V3R3 power-up."
},
{
"number": "33",
"name": "PWM6",
"type": "output",
"description": "PWM signal output for phase 6."
},
{
"number": "34",
"name": "PWM5",
"type": "output",
"description": "PWM signal output for phase 5."
},
{
"number": "35",
"name": "PWM4",
"type": "output",
"description": "PWM signal output for phase 4."
},
{
"number": "36",
"name": "PWM3",
"type": "output",
"description": "PWM signal output for phase 3."
},
{
"number": "37",
"name": "PWM2",
"type": "output",
"description": "PWM signal output for phase 2."
},
{
"number": "38",
"name": "PWM1",
"type": "output",
"description": "PWM signal output for phase 1."
},
{
"number": "39",
"name": "SKIP-NVM",
"type": "output",
"description": "A resistor to GND sets pinstrap or NVM configuration mode; can also connect to the FCCM pin of TI smart power stages for SKIP or FCCM operation."
},
{
"number": "40",
"name": "TSEN",
"type": "input",
"description": "Connect to the TAO/FAULT pin of TI smart power stages to sense the highest power stage temperature and the power stage fault signal."
},
{
"number": "41",
"name": "EP",
"type": "passive",
"description": "Exposed pad (from the footprint; not named in the datasheet pin table)."
}
],
"provenance": {
"extractor": "extract_pins 0.3",
"factory_chain": {
"factory": "2.0.0",
"extractor": "extract_pins 0.3",
"primary_model": "claude-sonnet-5-5",
"primary_mode": "text",
"consensus_model": "claude-sonnet-5-5",
"consensus": "agreed",
"guards": "pin_guards 0.1: passed",
"guard_notes": [
"extractor flagged: Pins 20 and 22 are listed as GND but the datasheet notes they are not the IC ground pin; confirm con; The datasheet gives no pin number for the thermal pad; 'EP' is used as the identifier.; Pin I/O types for SKIP-NVM (listed O but resistor-strapped) and TSEN follow the datasheet table; the"
],
"pages_sent": 15,
"cost_usd": 0.2104,
"at": "2026-10-23T09:01:41"
},
"datasheet": {
"url": "https://www.ti.com/cn/lit/gpn/tps53667",
"pages": 126,
"sha256": "994fd9ded6c778c5",
"source_tier": "lcsc"
},
"cad": "KiCad official (CC-BY-SA 4.0)",
"pins": {
"total": 41,
"described": 41,
"cites_pages": true,
"refuses_to_fabricate": true
}
},
"viewers": {
"symbol": "viewers/symbol.html",
"footprint": "viewers/footprint.html"
},
"models_3d": [
{
"file": "tps53667rtar.step",
"role": "plain",
"up": "Z",
"units": "mm",
"origin": "footprint origin = pad-pattern centre",
"seat": "z = 0",
"extents_mm": [
6.0,
6.0,
1.0
],
"zmin_mm": 0.0,
"centre_offset_mm": 0.0,
"footprint_binding": "identity",
"sha256": "e5b4286c2329085d9ef7f90d5eb5bf41a435241ecc1baaf1383823b6d6a946ae",
"checked": "2026-10-23",
"checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
},
{
"file": "tps53667rtar-etched.step",
"role": "eda",
"up": "Z",
"units": "mm",
"origin": "footprint origin = pad-pattern centre",
"seat": "z = 0",
"extents_mm": [
6.0,
6.0,
1.0
],
"zmin_mm": 0.0,
"centre_offset_mm": 0.0,
"footprint_binding": "identity",
"sha256": "3851da8e20f0f104d6dfcbd8731ac8ea643aed591c3a14fc5fe0c6ac7ce6d699",
"checked": "2026-10-23",
"checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
}
]
}
}