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TPS53316RGTR

Public Made by Adom

by adom

Texas Instruments DC-DC Converters, QFN-16(3x3). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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docs tps53316rgtr: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 3d ago
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README.md Initial commit: component/tps53316rgtr · Ray 4d ago
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tps53316rgtr-etched.glb tps53316rgtr: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 3d ago
tps53316rgtr-etched.step tps53316rgtr: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 3d ago
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tps53316rgtr.step Publish 0.1.0 · Ray 4d ago

TPS53316RGTR

Texas Instruments · DC-DC Converters · QFN-16(3x3)

TPS53316RGTR from Texas Instruments, in a QFN-16(3x3). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 EN input Enable pin, internally pulled up to VIN through a 2-MΩ resistor; the EN voltage must be less than (VIN + 0.5 V).
2 RF/OC input Switching frequency and OC level configuration pin: GND = 1.1 MHz/6.5-A OCP, floating or pulled high = 1.1 MHz/4.5-A OCP, 24.3 kΩ = 750 kHz/4.5 A, 57.6 kΩ = 750 kHz/6.5 A, 105 kΩ = 2 MHz/4.5 A, 174 kΩ = 2 MHz/6.5 A.
3 PGD output Open-drain power good output flag, pulled up to an external rail through a resistor.
4 VBST power_in Bootstrap supply input for the high-side MOSFET; connect a capacitor from this pin to the SW terminal.
5 SW bidirectional Output inductor connection to the integrated power devices.
6 SW bidirectional Output inductor connection to the integrated power devices.
7 SW bidirectional Output inductor connection to the integrated power devices.
8 PS input Mode configuration pin (10-µA current): GND = forced CCM with 4x soft-start, floating or pulled high = forced CCM with 1x soft-start, 24.3 kΩ = HEF with 4x, 57.6 kΩ = HEF, 105 kΩ = DE, 174 kΩ = DE with 4x soft-start.
9 COMP output Error amplifier compensation terminal; Type III compensation is generally recommended for stability.
10 FB input Voltage feedback pin used for OVP, UVP, and PGD determination.
11 AGND power_in Device analog ground terminal.
12 VREG3 power_out 3.3-V LDO output that supplies internal analog circuitry; the EN pin controls the LDO turn-on.
13 VIN power_in Gate driver supply and power conversion input voltage, range 2.9 V to 6 V.
14 VIN power_in Gate driver supply and power conversion input voltage, range 2.9 V to 6 V.
15 PGND power_in Device power ground terminal.
16 PGND power_in Device power ground terminal.
17 PowerPad passive Thermal pad of the device; use 4 or 5 vias to connect to the GND plane for heat dissipation.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package QFN-16(3x3)
Category Power Management (PMIC)
Pins 17

CAD (KiCad official)

  • Symbol: TPS53316RGTR
  • Footprint: Package_DFN_QFN:QFN-16-1EP_3x3mm_P0.5mm_EP1.7x1.7mm
  • 3D model: QFN-16(3x3) (KiCad packages3D, STEP)
  • 3D model files: tps53316rgtr-etched.step / tps53316rgtr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tps53316rgtr.step / tps53316rgtr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (35 pp, sha256 217940c314fbda04, retrieved 2026-10-01, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-4-5-20251001 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF