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Contents

README

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TPS51219RTER

Texas Instruments · DC-DC Converters · QFN-16-EP(3x3)

TPS51219RTER from Texas Instruments, in a QFN-16-EP(3x3). Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VREF power_in 2.0-V ±0.8% voltage reference output with 300-µA maximum current capability.
2 REFIN input Output voltage setting input; accepts 0.5-V to 2.0-V for programmable output voltage control.
3 GSNS input Ground sense input for differential feedback; short to GND if remote sensing not used.
4 VSNS input Voltage sense input for differential output voltage feedback at load point.
5 COMP input Compensation network connection for integrator feedback in control loop.
6 TRIP input Current sensing threshold configuration input with 10-µA source current and 4700-ppm/°C temperature coefficient.
7 GND power_in Analog ground reference; connect to quiet point on system ground plane.
8 PGND power_in Power ground return for low-side gate driver; connect as close as possible to device.
9 V5 power_in 5V power supply for internal circuits and gate drivers; operating range 4.5-V to 5.5-V.
10 DL output Low-side MOSFET gate driver output with source resistance 0.9-2.0 Ω and sink resistance 0.5-1.2 Ω.
11 DH output High-side MOSFET gate driver output with source resistance 1.6-3.0 Ω and sink resistance 0.6-1.5 Ω.
12 SW bidirectional Switching node return and RDS(on) current sense (-) input; voltage range -5V to 30V.
13 BST power_in Bootstrap voltage input for high-side gate driver; absolute maximum -0.3V to 36V.
14 EN input Enable control input with 100-ns debounce; VIH 1.8V, VIL 0.5V, hysteresis 0.25V.
15 MODE input Mode and frequency selection via resistor-to-GND divider with 16.7-µA source current.
16 PGOOD tri_state Open-drain power-good comparator output; indicates when output voltage within ±8% (typ) of target.
17 Thermal Pad passive Thermal pad for heat dissipation; connect directly to system ground plane with multiple vias.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package QFN-16-EP(3x3)
Category Power Management (PMIC)
Pins 17

CAD (KiCad official)

  • Symbol: TPS51219RTER
  • Footprint: Package_DFN_QFN:QFN-16-1EP_3x3mm_P0.5mm_EP1.7x1.7mm
  • 3D model: QFN-16-EP(3x3) (KiCad packages3D, STEP)
  • 3D model files: tps51219rter-etched.step / tps51219rter-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tps51219rter.step / tps51219rter.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (36 pp, sha256 d6e730c2602800ae, retrieved 2026-09-23, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: parts-factory 2.0.0 / extract_pins 0.2, primary claude-haiku-4-5-20251001 (text), consensus claude-sonnet-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF