component
TPS43061RTER
Public Made by Adomby adom
Texas Instruments DC-DC Converters, WQFN-16-EP(3x3). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownTPS43061RTER
Texas Instruments · DC-DC Converters · WQFN-16-EP(3x3)
TPS43061RTER from Texas Instruments, in a WQFN-16-EP(3x3). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | RT/CLK | input | Resistor timing and external clock pin; external resistor from this pin to AGND programs switching frequency between 50 kHz and 1 MHz, or external clock between 300 kHz to 1 MHz synchronizes switching frequency. |
| 2 | SS | input | Soft-start programming pin; capacitor between SS pin and AGND sets soft-start time. |
| 3 | COMP | output | Output of internal transconductance error amplifier; feedback loop compensation network connects from this pin to AGND. |
| 4 | FB | input | Error amplifier input and feedback pin for voltage regulation; connect to center tap of resistor divider to set output voltage. |
| 5 | ISNS- | input | Inductor current sense comparator inverting input pin; normally connected to inductor side of current sense resistor. |
| 6 | ISNS+ | input | Inductor current sense comparator non-inverting input pin; normally connected to VIN side of current sense resistor. |
| 7 | VIN | power_in | Input supply pin to the IC; connect to supply voltage between 4.5 V and 38 V absolute maximum 40 V. |
| 8 | LDRV | output | Low-side gate driver output; connect to gate of low-side N-channel MOSFET; when VIN bias is removed, internal 200-kΩ resistor pulls LDRV to PGND. |
| 9 | PGND | power_in | Power ground of IC; connect to source of low-side MOSFET; PGND should be connected to AGND via single point on PCB. |
| 10 | VCC | power_out | Output of internal LDO and power supply for internal control circuits and gate drivers; VCC typically 5.5 V for TPS43061; connect low-ESR ceramic capacitor from this pin to PGND with recommended capacitance range 0.47 to 10 µF. |
| 11 | BOOT | passive | Bootstrap capacitor node for high-side MOSFET gate driver; connect bootstrap capacitor from this pin to SW pin. |
| 12 | SW | passive | Switching node of boost converter; connect to junction of drain of low-side MOSFET, source of high-side synchronous MOSFET, and inductor. |
| 13 | HDRV | output | High-side gate driver output; connect to gate of high-side synchronous rectifier MOSFET; when VIN bias is removed, internally connected to SW through 200-kΩ resistor. |
| 14 | PGOOD | output | Power good indicator; open-drain output indicates when output voltage is within predetermined limits; TI recommends 10-kΩ pullup resistor to VCC or external logic supply pin. |
| 15 | EN | input | Enable pin with internal pullup current source; floating enables IC; pull below 1.2 V for standby mode; pull below 0.4 V for shutdown mode; can implement adjustable UVLO with two resistors. |
| 16 | AGND | power_in | Analog signal ground of IC; AGND should be connected to PGND at single point on PCB. |
| 17 | PowerPAD | passive | Thermal pad should be connected to AGND; use thermal vias to connect to internal ground plane for improved power dissipation. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | WQFN-16-EP(3x3) |
| Category | Power Management (PMIC) |
| Pins | 17 |
CAD (KiCad official)
- Symbol:
TPS43061RTER - Footprint:
Package_DFN_QFN:QFN-16-1EP_3x3mm_P0.5mm_EP1.7x1.7mm - 3D model: WQFN-16-EP(3x3) (KiCad packages3D, STEP)
- 3D model files:
tps43061rter-etched.step/tps43061rter-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);tps43061rter.step/tps43061rter.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (44 pp, sha256
2cd9f6a548135d9e, retrieved 2026-09-24, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.2, primaryclaude-haiku-4-5-20251001(text), consensusclaude-sonnet-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).