main
Ray Publish 0.1.0 6380afd 1mo ago
{
  "slug": "tps40425rhar",
  "version": "0.1.0",
  "type": "component",
  "description": "Texas Instruments DC-DC Converters, VQFN-40-EP(6x6). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
  "tags": [
    "component",
    "power management (pmic)",
    "tps40425rhar",
    "factory-2.0.0",
    "extractor-text"
  ],
  "dependencies": {},
  "hero": {
    "type": "image",
    "path": "docs/hero.png"
  },
  "files": [
    "page.json",
    "README.md",
    "tps40425rhar.kicad_sym",
    "tps40425rhar.kicad_mod",
    "tps40425rhar.glb",
    "tps40425rhar.step",
    "tps40425rhar.lbr",
    "docs/hero.png",
    "docs/tps40425rhar-datasheet.pdf",
    "viewers/symbol.html",
    "viewers/footprint.html",
    "tps40425rhar-hero.glb",
    "tps40425rhar-hero.overlay.json"
  ],
  "component": {
    "mpn": "TPS40425RHAR",
    "manufacturer": "Texas Instruments",
    "package": "VQFN-40-EP(6x6)",
    "pin_count": 41,
    "category": "Power Management (PMIC)",
    "subcategory": "DC-DC Converters",
    "datasheet": "https://www.ti.com/cn/lit/gpn/tps40425",
    "parts": {
      "symbol": "tps40425rhar.kicad_sym",
      "footprint": "tps40425rhar.kicad_mod",
      "model_3d": "tps40425rhar-hero.glb",
      "model_3d_plain": "tps40425rhar.glb",
      "model_3d_step": "tps40425rhar-etched.step",
      "model_3d_step_plain": "tps40425rhar.step",
      "lbr": "tps40425rhar.lbr"
    },
    "distributor_links": {
      "lcsc": "C2658694",
      "digikey": "TPS40425RHAR-ND",
      "mouser": "595-TPS40425RHAR"
    },
    "distributor_check": {
      "checked_at": "2026-10-08T22:54:11Z",
      "source": "Component Ocean /api/assign-pns",
      "digikey": {
        "pn": "TPS40425RHAR-ND",
        "status": "found",
        "lifecycle": "Active"
      },
      "mouser": {
        "pn": "595-TPS40425RHAR",
        "status": "found"
      }
    },
    "pins": [
      {
        "number": "1",
        "name": "SYNC",
        "type": "bidirectional",
        "description": "External clock synchronization pin; for 1-, 2- or 4-phase operation the sync frequency must be 4x the switching frequency, for 3-phase it must be 3x, as a 50% duty square wave with high threshold above 2 V and low threshold below 0.8 V."
      },
      {
        "number": "2",
        "name": "PHSET",
        "type": "bidirectional",
        "description": "Phase-set pin for multiphase operation, connected between controllers in 3- and 4-phase configurations to set the phase relationship; leave floating for dual-output or two-phase operation."
      },
      {
        "number": "3",
        "name": "CNTL1",
        "type": "input",
        "description": "Logic-level input that starts or stops channel 1; when left floating an internal 6 µA current source pulls it up to BP5."
      },
      {
        "number": "4",
        "name": "CNTL2",
        "type": "input",
        "description": "Logic-level input that starts or stops channel 2; when left floating an internal 6 µA current source pulls it up to BP5."
      },
      {
        "number": "5",
        "name": "SMBALERT",
        "type": "output",
        "description": "PMBus alert output used to signal faults or warnings to the bus master via the SMBus alert response protocol."
      },
      {
        "number": "6",
        "name": "PMBDATA",
        "type": "bidirectional",
        "description": "PMBus data pin, requires an external pull-up when used; the datasheet specifies 400 kHz PMBus operation with VOL max 0.4 V at 4 mA sink."
      },
      {
        "number": "7",
        "name": "PMBCLK",
        "type": "input",
        "description": "PMBus clock input supporting 100 kHz and 400 kHz bus speeds."
      },
      {
        "number": "8",
        "name": "AGND",
        "type": "power_in",
        "description": "Analog ground for analog signals; connect directly to the thermal pad, which is the only connection between AGND and PGND."
      },
      {
        "number": "9",
        "name": "AVSDATA",
        "type": "input",
        "description": "AVS data line for the high-speed AVSBus interface, 1.8 V or 2.5 V logic levels; may be left floating or tied to GND if AVS is disabled."
      },
      {
        "number": "10",
        "name": "AVSCLK",
        "type": "input",
        "description": "AVS clock input for the high-speed AVSBus interface, 10 MHz to 30 MHz, 1.8 V or 2.5 V logic levels; may be left floating or tied to GND if AVS is disabled."
      },
      {
        "number": "11",
        "name": "ADDR1",
        "type": "input",
        "description": "High-order PMBus address pin; connect a resistor to AGND per the E96 value table (sets address digit 0-7)."
      },
      {
        "number": "12",
        "name": "ADDR0",
        "type": "input",
        "description": "Low-order PMBus address pin; connect a resistor to AGND per the E96 value table (sets address digit 0-7)."
      },
      {
        "number": "13",
        "name": "GSNS2",
        "type": "input",
        "description": "Negative voltage-sense input for channel 2 output voltage; connect to ground for slave-channel or single-channel use as specified in the pin configuration tables."
      },
      {
        "number": "14",
        "name": "VSNS2",
        "type": "input",
        "description": "Positive voltage-sense input for channel 2 output voltage; may be tied to ground or to the output voltage in multiphase use as stated in the pin configuration tables."
      },
      {
        "number": "15",
        "name": "COMP2",
        "type": "output",
        "description": "Output of error amplifier 2 and connection node for the loop feedback compensation network."
      },
      {
        "number": "16",
        "name": "FB2",
        "type": "input",
        "description": "Inverting input of error amplifier 2 that equals the internal reference (600 mV) in normal operation; connect to BP5 to configure the channel as a slave."
      },
      {
        "number": "17",
        "name": "FLT2",
        "type": "bidirectional",
        "description": "Channel 2 fault signal, pulled up to BP3 through an internal 100 kΩ resistor; an external pull-down on this pin shuts channel 2 off."
      },
      {
        "number": "18",
        "name": "CS2N",
        "type": "input",
        "description": "Negative input of the channel 2 current-sense amplifier; internally pulled up to 1.24 V through 4 kΩ during smart power stage operation."
      },
      {
        "number": "19",
        "name": "CS2P",
        "type": "input",
        "description": "Positive input of the channel 2 current-sense amplifier; differential CSxP-CSxN limited to 60 mV in non-smart power mode."
      },
      {
        "number": "20",
        "name": "TSNS2",
        "type": "input",
        "description": "External temperature-sense input for channel 2 (ΔVbe of external transistor or smart power stage TAO signal); absolute maximum 3.6 V."
      },
      {
        "number": "21",
        "name": "ISH2",
        "type": "input",
        "description": "Current-share signal for channel 2 in multiphase operation; connect to the ISH bus."
      },
      {
        "number": "22",
        "name": "PG2",
        "type": "output",
        "description": "Open-drain power-good output for channel 2, internally pulled to ground when the output is outside its PGOOD window; absolute maximum 7 V."
      },
      {
        "number": "23",
        "name": "PWM2",
        "type": "output",
        "description": "PWM drive signal for channel 2 with three levels (high, low and tri-state); absolute maximum 7 V."
      },
      {
        "number": "24",
        "name": "VDD",
        "type": "power_in",
        "description": "Controller supply input, recommended 4.5 V to 20 V (absolute maximum 22 V); place at least a 1 µF low-ESR ceramic capacitor to AGND close to the pin."
      },
      {
        "number": "25",
        "name": "BP5",
        "type": "power_out",
        "description": "Internal regulator output (about 5 V) for bypass; place at least 1 µF low-ESR ceramic capacitor to PGND close to the pin, maximum recommended 10 µF."
      },
      {
        "number": "26",
        "name": "BP3",
        "type": "power_out",
        "description": "3.3 V bias output for logic; place at least 0.33 µF low-ESR ceramic capacitor to AGND close to the pin, maximum recommended 10 µF."
      },
      {
        "number": "27",
        "name": "PGND",
        "type": "power_in",
        "description": "Power ground for the BP5 bypass capacitor; connect directly to the thermal pad."
      },
      {
        "number": "28",
        "name": "PWM1",
        "type": "output",
        "description": "PWM drive signal for channel 1 with three levels (high, low and tri-state); absolute maximum 7 V."
      },
      {
        "number": "29",
        "name": "PG1",
        "type": "output",
        "description": "Open-drain power-good output for channel 1, internally pulled to ground when the output is outside its PGOOD window; absolute maximum 7 V."
      },
      {
        "number": "30",
        "name": "ISH1",
        "type": "input",
        "description": "Current-share signal for channel 1 in multiphase operation; connect to the ISH bus."
      },
      {
        "number": "31",
        "name": "TSNS1",
        "type": "input",
        "description": "External temperature-sense input for channel 1 (ΔVbe of external transistor or smart power stage TAO signal); absolute maximum 3.6 V."
      },
      {
        "number": "32",
        "name": "CS1P",
        "type": "input",
        "description": "Positive input of the channel 1 current-sense amplifier; differential CSxP-CSxN limited to 60 mV in non-smart power mode."
      },
      {
        "number": "33",
        "name": "CS1N",
        "type": "input",
        "description": "Negative input of the channel 1 current-sense amplifier; internally pulled up to 1.24 V through 4 kΩ during smart power stage operation."
      },
      {
        "number": "34",
        "name": "FLT1",
        "type": "bidirectional",
        "description": "Channel 1 fault signal, pulled up to BP3 through an internal 100 kΩ resistor; an external pull-down on this pin shuts channel 1 off."
      },
      {
        "number": "35",
        "name": "FB1",
        "type": "input",
        "description": "Inverting input of error amplifier 1 that equals the internal reference (600 mV) in normal operation; connect to BP5 to configure the channel as a slave."
      },
      {
        "number": "36",
        "name": "COMP1",
        "type": "output",
        "description": "Output of error amplifier 1 and connection node for the loop feedback compensation network."
      },
      {
        "number": "37",
        "name": "VSNS1",
        "type": "input",
        "description": "Positive voltage-sense input for channel 1 output voltage, used with GSNS1 as a differential remote-sense pair."
      },
      {
        "number": "38",
        "name": "GSNS1",
        "type": "input",
        "description": "Negative voltage-sense input for channel 1 output voltage, used with VSNS1 as a differential remote-sense pair."
      },
      {
        "number": "39",
        "name": "DIFFO1",
        "type": "output",
        "description": "Channel 1 remote-sense amplifier output; maximum output voltage 4.7 V, and the output must stay below BP5 minus 0.2 V."
      },
      {
        "number": "40",
        "name": "RT",
        "type": "input",
        "description": "Oscillator frequency-setting pin; connect a resistor to AGND to set fSW from 200 kHz to 1.5 MHz."
      },
      {
        "number": "41",
        "name": "PAD",
        "type": "power_in",
        "description": "Exposed thermal pad on the underside of the package; solder to the power-ground plane with sufficient vias, and it is the connection point for the AGND and PGND pins."
      }
    ],
    "provenance": {
      "extractor": "extract_pins 0.3",
      "factory_chain": {
        "factory": "2.0.0",
        "extractor": "extract_pins 0.3",
        "primary_model": "claude-haiku-5-5",
        "primary_mode": "text",
        "consensus_model": "claude-sonnet-5-5",
        "consensus": "agreed",
        "guards": "pin_guards 0.1: passed",
        "guard_notes": [
          "extractor flagged: The datasheet text is the Chinese (ZHCSCN6C) translation of the TI English datasheet SLUSBO6. Pin na; The thermal pad is not given as a numbered pin in the pin-function table. It is labelled 'PAD 41' on; Pin types for SYNC, PHSET, FLT1, FLT2, PMBDATA are I/O in the source and mapped to KiCad bidirection"
        ],
        "pages_sent": 62,
        "cost_usd": 0.3388,
        "at": "2026-10-08T22:53:06"
      },
      "datasheet": {
        "url": "https://www.ti.com/cn/lit/gpn/tps40425",
        "pages": 93,
        "sha256": "5b2a7a765da52948",
        "source_tier": "lcsc"
      },
      "cad": "KiCad official (CC-BY-SA 4.0)",
      "pins": {
        "total": 41,
        "described": 41,
        "cites_pages": true,
        "refuses_to_fabricate": true
      }
    },
    "viewers": {
      "symbol": "viewers/symbol.html",
      "footprint": "viewers/footprint.html"
    },
    "models_3d": [
      {
        "file": "tps40425rhar.step",
        "role": "plain",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          6.0,
          6.0,
          1.0
        ],
        "zmin_mm": 0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "e5b4286c2329085d9ef7f90d5eb5bf41a435241ecc1baaf1383823b6d6a946ae",
        "checked": "2026-10-08",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      },
      {
        "file": "tps40425rhar-etched.step",
        "role": "eda",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          6.0,
          6.0,
          1.0
        ],
        "zmin_mm": 0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "8071d72e5dae4239e1a352267a58d2780e315d45b3862b0045f8c9fb2bb34f7d",
        "checked": "2026-10-08",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      }
    ]
  }
}