# TPS40210DGQR

**Texas Instruments** · DC-DC Converters · HVSSOP-10

TPS40210DGQR from Texas Instruments, in a HVSSOP-10. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | RC | input | Oscillator timing pin; connect resistor to VDD and capacitor to GND to set switching frequency between 35 kHz and 1000 kHz. |
| 2 | SS | input | Soft start programming pin; connect external capacitor to GND to configure soft start time with charge resistance 320-600 kΩ and discharge resistance 840-1600 kΩ. |
| 3 | DIS/EN | input | Disable/enable pin with internal 1 MΩ pull-down to GND; device enters shutdown mode when pulled above 1.3 V; enabled when below 0.7 V. |
| 4 | COMP | output | Error amplifier output for loop compensation; capable of sourcing 100-250 μA or sinking 1.2-2.5 mA; connect compensation network between COMP and FB. |
| 5 | FB | input | Error amplifier inverting input; connect output voltage divider to this pin to set output voltage; compensation network connects between FB and COMP. |
| 6 | GND | power_in | Device ground reference. |
| 7 | ISNS | input | Current sense input; connect current sense resistor between ISNS and GND; overcurrent detected at threshold voltage 120-180 mV (150 mV typical). |
| 8 | GDRV | output | Gate drive output for N-channel power MOSFET; source current 375-400 mA and sink current 330-400 mA at 4 V. |
| 9 | BP | output | Internal regulator output voltage 7-9 V at 0-15 mA load; connect 1.0 μF bypass capacitor between BP and GND. |
| 10 | VDD | power_in | System input power supply 4.5 V to 52 V; place bypass capacitor near this pin connected to GND; can be connected to converter output for slope compensation. |
| 11 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | HVSSOP-10 |
| Category | Power Management (PMIC) |
| Pins | 11 |

## CAD (KiCad official)

- Symbol: `TPS40210DGQR`
- Footprint: `Package_SO:HVSSOP-10-1EP_3x3mm_P0.5mm_EP1.83x1.89mm`
- 3D model: HVSSOP-10, generated from the KiCad footprint (body from the F.Fab outline, terminals on the pads, 1.0 mm nominal HVSSOP height). Neither the vendor nor KiCad ships a 3D model for this package, so the dimensions are nominal, not the manufacturer's CAD (STEP)
- 3D model files: `tps40210dgqr-etched.step` / `tps40210dgqr-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `tps40210dgqr.step` / `tps40210dgqr.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/tps40210) (50 pp, sha256 `7213a870ac0ef0d9`, retrieved 2026-10-01, tier: lcsc)
- **Datasheet language:** Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.2`, primary `claude-haiku-4-5-20251001` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/tps40210dgqr-datasheet.pdf)