TPS40195PWR

{
  "slug": "tps40195pwr",
  "version": "0.1.0",
  "type": "component",
  "description": "Texas Instruments DC-DC Converters, TSSOP-16. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
  "tags": [
    "component",
    "power management (pmic)",
    "tps40195pwr",
    "factory-2.0.0",
    "extractor-text"
  ],
  "dependencies": {},
  "hero": {
    "type": "image",
    "path": "docs/hero.png"
  },
  "files": [
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    "README.md",
    "tps40195pwr.kicad_sym",
    "tps40195pwr.kicad_mod",
    "tps40195pwr.glb",
    "tps40195pwr.step",
    "tps40195pwr.lbr",
    "docs/hero.png",
    "docs/tps40195pwr-datasheet.pdf",
    "viewers/symbol.html",
    "viewers/footprint.html",
    "tps40195pwr-hero.glb",
    "tps40195pwr-hero.overlay.json",
    "tps40195pwr-etched.glb"
  ],
  "component": {
    "mpn": "TPS40195PWR",
    "manufacturer": "Texas Instruments",
    "package": "TSSOP-16",
    "pin_count": 16,
    "category": "Power Management (PMIC)",
    "subcategory": "DC-DC Converters",
    "datasheet": "https://www.ti.com/lit/ds/symlink/tps40195.pdf",
    "parts": {
      "symbol": "tps40195pwr.kicad_sym",
      "footprint": "tps40195pwr.kicad_mod",
      "model_3d": "tps40195pwr-hero.glb",
      "model_3d_plain": "tps40195pwr-etched.glb",
      "model_3d_step": "tps40195pwr-etched.step",
      "model_3d_step_plain": "tps40195pwr.step",
      "lbr": "tps40195pwr.lbr"
    },
    "distributor_links": {
      "lcsc": "C702241",
      "digikey": "296-21617-2-ND",
      "mouser": "595-TPS40195PWR"
    },
    "distributor_check": {
      "checked_at": "2026-11-05T22:07:19Z",
      "source": "Component Ocean /api/assign-pns",
      "digikey": {
        "pn": "296-21617-2-ND",
        "status": "found"
      },
      "mouser": {
        "pn": "595-TPS40195PWR",
        "status": "found"
      }
    },
    "pins": [
      {
        "number": "1",
        "name": "EN",
        "type": "input",
        "description": "Logic-level enable input; a high level turns the controller on and the pin must be pulled below 600 mV to enter shutdown, with a weak internal pull-up holding it high when floating."
      },
      {
        "number": "2",
        "name": "FB",
        "type": "input",
        "description": "Inverting input to the error amplifier, which in normal operation sits at the internal 591 mV typical reference voltage."
      },
      {
        "number": "3",
        "name": "COMP",
        "type": "output",
        "description": "Output of the error amplifier."
      },
      {
        "number": "4",
        "name": "VDD",
        "type": "power_in",
        "description": "Power input to the controller, specified from 4.5 V to 20 V, with a 100-nF bypass capacitor to GND placed close to the pin."
      },
      {
        "number": "5",
        "name": "UVLO",
        "type": "input",
        "description": "Programmable undervoltage lockout pin; a resistor divider from VDD sets the turn-on voltage (1.26 V threshold) and the hysteresis via a 5.2 µA current source."
      },
      {
        "number": "6",
        "name": "RT",
        "type": "input",
        "description": "Switching frequency programming pin; a resistor to GND sets 100 kHz to 600 kHz, while connection to GND or BP fixes 250 kHz or 500 kHz with SYNC as an output."
      },
      {
        "number": "7",
        "name": "ILIM",
        "type": "input",
        "description": "Current limit pin that sets the low-side MOSFET overcurrent threshold through a resistor connected to GND."
      },
      {
        "number": "8",
        "name": "GND",
        "type": "power_in",
        "description": "Common reference ground for the device."
      },
      {
        "number": "9",
        "name": "SYNC",
        "type": "bidirectional",
        "description": "Bidirectional synchronization pin that is an output (falling edge 180° out of phase with HDRV) when RT is tied to GND or BP, and an input synchronizing to the falling edge of an external clock when RT is resistor-programmed; connect to GND if unused."
      },
      {
        "number": "10",
        "name": "PGOOD",
        "type": "output",
        "description": "Open-drain power good output that is pulled low during any fault, during soft start, or when the FB voltage is outside the specified window."
      },
      {
        "number": "11",
        "name": "SS_SEL",
        "type": "input",
        "description": "Soft-start timing selection pin, connected to GND, BP, or left floating to select 2048, 1024, or 512 DAC clock cycles respectively."
      },
      {
        "number": "12",
        "name": "BP",
        "type": "power_out",
        "description": "Output bypass for the internal regulator, requiring a capacitor of 1 µF or greater to GND, up to 4.7 µF for improved noise performance; not to be connected to VDD or driven externally."
      },
      {
        "number": "13",
        "name": "LDRV",
        "type": "output",
        "description": "Gate drive output for the low-side N-channel FET."
      },
      {
        "number": "14",
        "name": "BOOT",
        "type": "input",
        "description": "Gate drive voltage for the high-side N-channel MOSFET, requiring a 100-nF typical capacitor connected between this pin and SW."
      },
      {
        "number": "15",
        "name": "SW",
        "type": "input",
        "description": "Sense line for the adaptive anti-cross conduction circuitry and common connection for the flying high-side MOSFET driver."
      },
      {
        "number": "16",
        "name": "HDRV",
        "type": "output",
        "description": "Gate drive output to the high-side N-channel FET."
      }
    ],
    "provenance": {
      "extractor": "extract_pins 0.3",
      "factory_chain": {
        "factory": "2.0.0",
        "extractor": "extract_pins 0.3",
        "primary_model": "claude-haiku-5-5",
        "primary_mode": "text",
        "consensus_model": "claude-sonnet-5-5",
        "consensus": "agreed",
        "guards": "pin_guards 0.1: passed",
        "guard_notes": [
          "extractor flagged: Pinout taken from the 16-pin TSSOP (PW) package top view and pin functions table; the orderable adde"
        ],
        "pages_sent": 13,
        "cost_usd": 0.023,
        "at": "2026-11-05T22:07:01"
      },
      "datasheet": {
        "url": "https://www.ti.com/lit/ds/symlink/tps40195.pdf",
        "pages": 47,
        "sha256": "f9ecda370c4be9f6",
        "source_tier": "mfr"
      },
      "cad": "KiCad official (CC-BY-SA 4.0)",
      "pins": {
        "total": 16,
        "described": 16,
        "cites_pages": true,
        "refuses_to_fabricate": true
      }
    },
    "viewers": {
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      "footprint": "viewers/footprint.html"
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        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
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        "zmin_mm": -0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "6ad5e98224d02a427d9a6b929a28dbc158b9925fba5adec12db05079f1016948",
        "checked": "2026-11-05",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
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        "checked": "2026-11-05",
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  }
}