component
TPS3836L30QDBVRQ1
Public Made by Adomby adom
Texas Instruments Supervisor And Reset ICs, SOT-23-5. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
main
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"component": {
"mpn": "TPS3836L30QDBVRQ1",
"manufacturer": "Texas Instruments",
"package": "SOT-23-5",
"pin_count": 5,
"category": "Power Management (PMIC)",
"subcategory": "Supervisor And Reset ICs",
"datasheet": "https://www.ti.com/cn/lit/gpn/tps3836-q1",
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"pins": [
{
"number": "1",
"name": "CT",
"type": "input",
"description": "Capacitive timing input; selects power-on reset delay time of 10 ms when connected to GND or 200 ms when connected to VDD; input capacitance 5 pF typical at VI = 0 V to VDD."
},
{
"number": "2",
"name": "GND",
"type": "power_in",
"description": "Ground/reference voltage connection."
},
{
"number": "3",
"name": "MR",
"type": "input",
"description": "Active-low manual reset input with internal 30 kΩ pullup resistor; minimum pulse width 1 µs at VDD ≥ VIT + 0.2 V; low-level input current −200 µA typical at 0 V."
},
{
"number": "4",
"name": "VDD",
"type": "power_in",
"description": "Positive supply voltage input; recommended operating range 1.6 V to 6 V; monitored for power-on reset with threshold voltage VIT = 2.64 V (L30); supply current 220 nA to 550 nA typical above VIT."
},
{
"number": "5",
"name": "RESET",
"type": "output",
"description": "Active-low push-pull reset output (TPS3836); asserted low when VDD falls below VIT or MR is pulled low; propagation delay 10 µs typical; internal timer delay of 10 ms (CT = GND) or 200 ms (CT = VDD) before output returns high."
}
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