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TPS3613-01DGSR
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Texas Instruments Supervisor And Reset ICs, VSSOP-10-0.5mm. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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TPS3613-01DGSR
Texas Instruments · Supervisor And Reset ICs · VSSOP-10-0.5mm
TPS3613-01DGSR from Texas Instruments, in a VSSOP-10-0.5mm. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VOUT | power_out | Supply output that connects to VDD through a 1-Ω (max) PMOS switch once VDD crosses the reset threshold, and to VBAT during backup-battery operation. |
| 2 | VDD | power_in | Input supply voltage, recommended 1.65 V to 5.5 V. |
| 3 | GND | power_in | Ground reference; all voltages in the datasheet are referenced to GND. |
| 4 | MR | input | Manual reset input, with VIH of 0.7 × VDD and VIL of 0.3 × VDD, and input rise/fall rate limited to 100 ns/V. |
| 5 | CEIN | input | Chip-enable input that passes CE transitions through a series transmission gate to CEOUT when reset is not asserted, and goes high impedance while reset is asserted. |
| 6 | CEOUT | output | Chip-enable output that follows CEIN when the gate is enabled, and is pulled up to VOUT by an active pullup in disable mode. |
| 7 | RESET | output | Active-high reset output that is asserted while SENSE is below the threshold VIT (1.13 V to 1.17 V). |
| 8 | SENSE | input | Adjustable sense input that monitors VDD through external feedback resistors, with threshold VIT of 1.13 V to 1.17 V. |
| 9 | /RESET | output | Active-low reset output that is asserted while SENSE is below the threshold VIT (1.13 V to 1.17 V). |
| 10 | VBAT | power_in | Backup-battery input, recommended 1.5 V to 5.5 V, which supplies VOUT when VDD falls below VIT and VBAT is greater than VDD. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | VSSOP-10-0.5mm |
| Category | Power Management (PMIC) |
| Pins | 10 |
CAD (KiCad official)
- Symbol:
TPS3613-01DGSR - Footprint:
Package_SO:MSOP-10_3x3mm_P0.5mm - 3D model: VSSOP-10-0.5mm (KiCad packages3D, STEP)
- 3D model files:
tps3613-01dgsr-etched.step/tps3613-01dgsr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);tps3613-01dgsr.step/tps3613-01dgsr.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (21 pp, sha256
ff574333442dfa04, retrieved 2026-10-08, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# TPS3613-01DGSR
**Texas Instruments** · Supervisor And Reset ICs · VSSOP-10-0.5mm
TPS3613-01DGSR from Texas Instruments, in a VSSOP-10-0.5mm. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VOUT | power_out | Supply output that connects to VDD through a 1-Ω (max) PMOS switch once VDD crosses the reset threshold, and to VBAT during backup-battery operation. |
| 2 | VDD | power_in | Input supply voltage, recommended 1.65 V to 5.5 V. |
| 3 | GND | power_in | Ground reference; all voltages in the datasheet are referenced to GND. |
| 4 | MR | input | Manual reset input, with VIH of 0.7 × VDD and VIL of 0.3 × VDD, and input rise/fall rate limited to 100 ns/V. |
| 5 | CEIN | input | Chip-enable input that passes CE transitions through a series transmission gate to CEOUT when reset is not asserted, and goes high impedance while reset is asserted. |
| 6 | CEOUT | output | Chip-enable output that follows CEIN when the gate is enabled, and is pulled up to VOUT by an active pullup in disable mode. |
| 7 | RESET | output | Active-high reset output that is asserted while SENSE is below the threshold VIT (1.13 V to 1.17 V). |
| 8 | SENSE | input | Adjustable sense input that monitors VDD through external feedback resistors, with threshold VIT of 1.13 V to 1.17 V. |
| 9 | /RESET | output | Active-low reset output that is asserted while SENSE is below the threshold VIT (1.13 V to 1.17 V). |
| 10 | VBAT | power_in | Backup-battery input, recommended 1.5 V to 5.5 V, which supplies VOUT when VDD falls below VIT and VBAT is greater than VDD. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | VSSOP-10-0.5mm |
| Category | Power Management (PMIC) |
| Pins | 10 |
## CAD (KiCad official)
- Symbol: `TPS3613-01DGSR`
- Footprint: `Package_SO:MSOP-10_3x3mm_P0.5mm`
- 3D model: VSSOP-10-0.5mm (KiCad packages3D, STEP)
- 3D model files: `tps3613-01dgsr-etched.step` / `tps3613-01dgsr-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `tps3613-01dgsr.step` / `tps3613-01dgsr.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/tps3613-01) (21 pp, sha256 `ff574333442dfa04`, retrieved 2026-10-08, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/tps3613-01dgsr-datasheet.pdf)