component
TPS3613-01DGSR
Public Made by Adomby adom
Texas Instruments Supervisor And Reset ICs, VSSOP-10-0.5mm. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
← Commit history
README.mdadded+46@@ -0,0 +1,46 @@+# TPS3613-01DGSR++**Texas Instruments** · Supervisor And Reset ICs · VSSOP-10-0.5mm++TPS3613-01DGSR from Texas Instruments, in a VSSOP-10-0.5mm. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | VOUT | power_out | Supply output that connects to VDD through a 1-Ω (max) PMOS switch once VDD crosses the reset threshold, and to VBAT during backup-battery operation. |+| 2 | VDD | power_in | Input supply voltage, recommended 1.65 V to 5.5 V. |+| 3 | GND | power_in | Ground reference; all voltages in the datasheet are referenced to GND. |+| 4 | MR | input | Manual reset input, with VIH of 0.7 × VDD and VIL of 0.3 × VDD, and input rise/fall rate limited to 100 ns/V. |+| 5 | CEIN | input | Chip-enable input that passes CE transitions through a series transmission gate to CEOUT when reset is not asserted, and goes high impedance while reset is asserted. |+| 6 | CEOUT | output | Chip-enable output that follows CEIN when the gate is enabled, and is pulled up to VOUT by an active pullup in disable mode. |+| 7 | RESET | output | Active-high reset output that is asserted while SENSE is below the threshold VIT (1.13 V to 1.17 V). |+| 8 | SENSE | input | Adjustable sense input that monitors VDD through external feedback resistors, with threshold VIT of 1.13 V to 1.17 V. |+| 9 | /RESET | output | Active-low reset output that is asserted while SENSE is below the threshold VIT (1.13 V to 1.17 V). |+| 10 | VBAT | power_in | Backup-battery input, recommended 1.5 V to 5.5 V, which supplies VOUT when VDD falls below VIT and VBAT is greater than VDD. |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | Texas Instruments |+| Package | VSSOP-10-0.5mm |+| Category | Power Management (PMIC) |+| Pins | 10 |++## CAD (KiCad official)++- Symbol: `TPS3613-01DGSR`+- Footprint: `Package_SO:MSOP-10_3x3mm_P0.5mm`+- 3D model: VSSOP-10-0.5mm (KiCad packages3D, STEP)+- 3D model files: `tps3613-01dgsr-etched.step` / `tps3613-01dgsr-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `tps3613-01dgsr.step` / `tps3613-01dgsr.glb` are the bare package body.++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/tps3613-01) (21 pp, sha256 `ff574333442dfa04`, retrieved 2026-10-08, tier: lcsc)+- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/tps3613-01dgsr-datasheet.pdf)
page.jsonadded+211@@ -0,0 +1,211 @@+{+ "slug": "tps3613-01dgsr",+ "version": "0.1.0",+ "type": "component",+ "description": "Texas Instruments Supervisor And Reset ICs, VSSOP-10-0.5mm. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",+ "tags": [+ "component",+ "power management (pmic)",+ "tps3613-01dgsr",+ "factory-2.0.0",+ "extractor-text"+ ],+ "dependencies": {},+ "hero": {+ "type": "image",+ "path": "docs/hero.png"+ },+ "files": [+ "page.json",+ "README.md",+ "tps3613-01dgsr.kicad_sym",+ "tps3613-01dgsr.kicad_mod",+ "tps3613-01dgsr.glb",+ "tps3613-01dgsr.step",+ "tps3613-01dgsr.lbr",+ "docs/hero.png",+ "docs/tps3613-01dgsr-datasheet.pdf",+ "viewers/symbol.html",+ "viewers/footprint.html",+ "tps3613-01dgsr-hero.glb",+ "tps3613-01dgsr-hero.overlay.json"+ ],+ "component": {+ "mpn": "TPS3613-01DGSR",+ "manufacturer": "Texas Instruments",+ "package": "VSSOP-10-0.5mm",+ "pin_count": 10,+ "category": "Power Management (PMIC)",+ "subcategory": "Supervisor And Reset ICs",+ "datasheet": "https://www.ti.com/cn/lit/gpn/tps3613-01",+ "parts": {+ "symbol": "tps3613-01dgsr.kicad_sym",+ "footprint": "tps3613-01dgsr.kicad_mod",+ "model_3d": "tps3613-01dgsr-hero.glb",+ "model_3d_plain": "tps3613-01dgsr.glb",+ "model_3d_step": "tps3613-01dgsr-etched.step",+ "model_3d_step_plain": "tps3613-01dgsr.step",+ "lbr": "tps3613-01dgsr.lbr"+ },+ "distributor_links": {+ "lcsc": "C2066172",+ "digikey": "296-28005-2-ND",+ "mouser": "595-TPS3613-01DGSR"+ },+ "distributor_check": {+ "checked_at": "2026-10-08T02:05:25Z",+ "source": "Component Ocean /api/assign-pns",+ "digikey": {+ "pn": "296-28005-2-ND",+ "status": "found"+ },+ "mouser": {+ "pn": "595-TPS3613-01DGSR",+ "status": "found"+ }+ },+ "pins": [+ {+ "number": "1",+ "name": "VOUT",+ "type": "power_out",+ "description": "Supply output that connects to VDD through a 1-Ω (max) PMOS switch once VDD crosses the reset threshold, and to VBAT during backup-battery operation."+ },+ {+ "number": "2",+ "name": "VDD",+ "type": "power_in",+ "description": "Input supply voltage, recommended 1.65 V to 5.5 V."+ },+ {+ "number": "3",+ "name": "GND",+ "type": "power_in",+ "description": "Ground reference; all voltages in the datasheet are referenced to GND."+ },+ {+ "number": "4",+ "name": "MR",+ "type": "input",+ "description": "Manual reset input, with VIH of 0.7 × VDD and VIL of 0.3 × VDD, and input rise/fall rate limited to 100 ns/V."+ },+ {+ "number": "5",+ "name": "CEIN",+ "type": "input",+ "description": "Chip-enable input that passes CE transitions through a series transmission gate to CEOUT when reset is not asserted, and goes high impedance while reset is asserted."+ },+ {+ "number": "6",+ "name": "CEOUT",+ "type": "output",+ "description": "Chip-enable output that follows CEIN when the gate is enabled, and is pulled up to VOUT by an active pullup in disable mode."+ },+ {+ "number": "7",+ "name": "RESET",+ "type": "output",+ "description": "Active-high reset output that is asserted while SENSE is below the threshold VIT (1.13 V to 1.17 V)."+ },+ {+ "number": "8",+ "name": "SENSE",+ "type": "input",+ "description": "Adjustable sense input that monitors VDD through external feedback resistors, with threshold VIT of 1.13 V to 1.17 V."+ },+ {+ "number": "9",+ "name": "/RESET",+ "type": "output",+ "description": "Active-low reset output that is asserted while SENSE is below the threshold VIT (1.13 V to 1.17 V)."+ },+ {+ "number": "10",+ "name": "VBAT",+ "type": "power_in",+ "description": "Backup-battery input, recommended 1.5 V to 5.5 V, which supplies VOUT when VDD falls below VIT and VBAT is greater than VDD."+ }+ ],+ "provenance": {+ "extractor": "extract_pins 0.3",+ "factory_chain": {+ "factory": "2.0.0",+ "extractor": "extract_pins 0.3",+ "primary_model": "claude-haiku-5-5",+ "primary_mode": "text",+ "consensus_model": "claude-sonnet-5-5",+ "consensus": "agreed",+ "guards": "pin_guards 0.1: passed",+ "guard_notes": [+ "extractor flagged: The datasheet text extraction drops the overbar, so both reset outputs print as 'RESET'. Pin 7 is id; The datasheet lists VOUT as type 'O' (output). It is mapped to KiCad power_out because it is a suppl; VDD and VBAT are typed 'I' in the datasheet. They are mapped to power_in because they are supply inp"+ ],+ "pages_sent": 21,+ "cost_usd": 0.0843,+ "at": "2026-10-08T02:05:09"+ },+ "datasheet": {+ "url": "https://www.ti.com/cn/lit/gpn/tps3613-01",+ "pages": 21,+ "sha256": "ff574333442dfa04",+ "source_tier": "lcsc"+ },+ "cad": "KiCad official (CC-BY-SA 4.0)",+ "pins": {+ "total": 10,+ "described": 10,+ "cites_pages": true,+ "refuses_to_fabricate": true+ }+ },+ "viewers": {+ "symbol": "viewers/symbol.html",+ "footprint": "viewers/footprint.html"+ },+ "models_3d": [+ {+ "file": "tps3613-01dgsr.step",+ "role": "plain",+ "up": "Z",+ "units": "mm",+ "origin": "footprint origin = pad-pattern centre",+ "seat": "z = 0",+ "extents_mm": [+ 4.9,+ 3,+ 1.1+ ],+ "zmin_mm": 0,+ "centre_offset_mm": 0,+ "footprint_binding": "identity",+ "sha256": "b8f88eac3ce221c2ccb0b5048f9ad49c2ef4af148f8ae50c4e232e357683f547",+ "checked": "2026-10-08",+ "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+ },+ {+ "file": "tps3613-01dgsr-etched.step",+ "role": "eda",+ "up": "Z",+ "units": "mm",+ "origin": "footprint origin = pad-pattern centre",+ "seat": "z = 0",+ "extents_mm": [+ 4.9,+ 3,+ 1.1+ ],+ "zmin_mm": 0,+ "centre_offset_mm": 0,+ "footprint_binding": "identity",+ "sha256": "d85c5a1392ec2b0cbe121f49195d606029f7ef737d3fbc96e821d5051431b7be",+ "checked": "2026-10-08",+ "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+ }+ ]+ },+ "visibility": "public",+ "org": "adom",+ "author": {+ "name": "Ray",+ "email": "[email protected]"+ }+}