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TPS28225DRBR
Public Made by Adomby adom
Texas Instruments Gate Drivers, SON-8-EP(3x3). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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TPS28225DRBR
Texas Instruments · Gate Drivers · SON-8-EP(3x3)
TPS28225DRBR from Texas Instruments, in a SON-8-EP(3x3). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | UGATE | output | Upper gate drive sink/source output, connect to high-side N-Channel MOSFET gate. |
| 2 | BOOT | bidirectional | Floating bootstrap supply pin for upper gate drive; connect bootstrap capacitor between this pin and PHASE pin. |
| 3 | PWM | input | PWM control input supporting three distinct operating states. |
| 4 | GND | power_in | Ground reference pin; all signals are referenced to this node. |
| 5 | LGATE | output | Lower gate drive sink/source output, connect to low-side N-Channel MOSFET gate. |
| 6 | VDD | power_in | 5-V bias supply input; place high quality bypass capacitor from this pin to GND. |
| 7 | EN/PG | bidirectional | Enable/power good input/output with 1-MΩ impedance; pull high to enable or low to disable (quiescent < 350-μA); internally pulled low on UVLO or over-temperature shutdown. |
| 8 | PHASE | input | Phase node connected to upper MOSFET source and lower MOSFET drain; provides return path for upper gate driver. |
| 9 | Thermal pad | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SON-8-EP(3x3) |
| Category | Motor Driver ICs |
| Pins | 9 |
CAD (KiCad official)
- Symbol:
TPS28225DRBR - Footprint:
Package_SON:WSON-8-1EP_3x3mm_P0.5mm_EP1.6x2.0mm - 3D model: SON-8-EP(3x3) (KiCad packages3D, STEP)
- 3D model files:
tps28225drbr-etched.step/tps28225drbr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);tps28225drbr.step/tps28225drbr.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (42 pp, sha256
6b4cd5d2b7790f56, retrieved 2026-10-03, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-4-5-20251001(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# TPS28225DRBR
**Texas Instruments** · Gate Drivers · SON-8-EP(3x3)
TPS28225DRBR from Texas Instruments, in a SON-8-EP(3x3). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | UGATE | output | Upper gate drive sink/source output, connect to high-side N-Channel MOSFET gate. |
| 2 | BOOT | bidirectional | Floating bootstrap supply pin for upper gate drive; connect bootstrap capacitor between this pin and PHASE pin. |
| 3 | PWM | input | PWM control input supporting three distinct operating states. |
| 4 | GND | power_in | Ground reference pin; all signals are referenced to this node. |
| 5 | LGATE | output | Lower gate drive sink/source output, connect to low-side N-Channel MOSFET gate. |
| 6 | VDD | power_in | 5-V bias supply input; place high quality bypass capacitor from this pin to GND. |
| 7 | EN/PG | bidirectional | Enable/power good input/output with 1-MΩ impedance; pull high to enable or low to disable (quiescent < 350-μA); internally pulled low on UVLO or over-temperature shutdown. |
| 8 | PHASE | input | Phase node connected to upper MOSFET source and lower MOSFET drain; provides return path for upper gate driver. |
| 9 | Thermal pad | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SON-8-EP(3x3) |
| Category | Motor Driver ICs |
| Pins | 9 |
## CAD (KiCad official)
- Symbol: `TPS28225DRBR`
- Footprint: `Package_SON:WSON-8-1EP_3x3mm_P0.5mm_EP1.6x2.0mm`
- 3D model: SON-8-EP(3x3) (KiCad packages3D, STEP)
- 3D model files: `tps28225drbr-etched.step` / `tps28225drbr-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `tps28225drbr.step` / `tps28225drbr.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/tps28225) (42 pp, sha256 `6b4cd5d2b7790f56`, retrieved 2026-10-03, tier: lcsc)
- **Datasheet language:** Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-4-5-20251001` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/tps28225drbr-datasheet.pdf)