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Initial commit: component/tps28225drbr

Ray ·ec19dd4861 ·3d ago
2 files changed +212
README.mdadded+46
@@ -0,0 +1,46 @@+# TPS28225DRBR++**Texas Instruments** · Gate Drivers · SON-8-EP(3x3)++TPS28225DRBR from Texas Instruments, in a SON-8-EP(3x3). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | UGATE | output | Upper gate drive sink/source output, connect to high-side N-Channel MOSFET gate. |+| 2 | BOOT | bidirectional | Floating bootstrap supply pin for upper gate drive; connect bootstrap capacitor between this pin and PHASE pin. |+| 3 | PWM | input | PWM control input supporting three distinct operating states. |+| 4 | GND | power_in | Ground reference pin; all signals are referenced to this node. |+| 5 | LGATE | output | Lower gate drive sink/source output, connect to low-side N-Channel MOSFET gate. |+| 6 | VDD | power_in | 5-V bias supply input; place high quality bypass capacitor from this pin to GND. |+| 7 | EN/PG | bidirectional | Enable/power good input/output with 1-MΩ impedance; pull high to enable or low to disable (quiescent < 350-μA); internally pulled low on UVLO or over-temperature shutdown. |+| 8 | PHASE | input | Phase node connected to upper MOSFET source and lower MOSFET drain; provides return path for upper gate driver. |+| 9 | Thermal pad | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | Texas Instruments |+| Package | SON-8-EP(3x3) |+| Category | Motor Driver ICs |+| Pins | 9 |++## CAD (KiCad official)++- Symbol: `TPS28225DRBR`+- Footprint: `Package_SON:WSON-8-1EP_3x3mm_P0.5mm_EP1.6x2.0mm`+- 3D model: SON-8-EP(3x3) (KiCad packages3D, STEP)+- 3D model files: `tps28225drbr-etched.step` / `tps28225drbr-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `tps28225drbr.step` / `tps28225drbr.glb` are the bare package body.++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/tps28225) (42 pp, sha256 `6b4cd5d2b7790f56`, retrieved 2026-10-03, tier: lcsc)+- **Datasheet language:** Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.+- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-4-5-20251001` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/tps28225drbr-datasheet.pdf)
page.jsonadded+166
@@ -0,0 +1,166 @@+{+  "slug": "tps28225drbr",+  "version": "0.1.0",+  "type": "component",+  "description": "Texas Instruments Gate Drivers, SON-8-EP(3x3). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",+  "tags": [+    "component",+    "motor driver ics",+    "tps28225drbr",+    "factory-2.0.0",+    "extractor-text"+  ],+  "dependencies": {},+  "hero": {+    "type": "image",+    "path": "docs/hero.png"+  },+  "files": [+    "page.json",+    "README.md",+    "tps28225drbr.kicad_sym",+    "tps28225drbr.kicad_mod",+    "tps28225drbr.glb",+    "tps28225drbr.step",+    "tps28225drbr.lbr",+    "docs/hero.png",+    "docs/tps28225drbr-datasheet.pdf",+    "viewers/symbol.html",+    "viewers/footprint.html",+    "tps28225drbr-hero.glb",+    "tps28225drbr-hero.overlay.json"+  ],+  "component": {+    "mpn": "TPS28225DRBR",+    "manufacturer": "Texas Instruments",+    "package": "SON-8-EP(3x3)",+    "pin_count": 9,+    "category": "Motor Driver ICs",+    "subcategory": "Gate Drivers",+    "datasheet": "https://www.ti.com/cn/lit/gpn/tps28225",+    "parts": {+      "symbol": "tps28225drbr.kicad_sym",+      "footprint": "tps28225drbr.kicad_mod",+      "model_3d": "tps28225drbr-hero.glb",+      "model_3d_plain": "tps28225drbr.glb",+      "model_3d_step": "tps28225drbr-etched.step",+      "model_3d_step_plain": "tps28225drbr.step",+      "lbr": "tps28225drbr.lbr"+    },+    "distributor_links": {+      "lcsc": 2676914,+      "digikey": "296-46379-2-ND",+      "mouser": "595-TPS28225DRBR"+    },+    "distributor_check": {+      "checked_at": "2026-10-03T04:35:44Z",+      "source": "Component Ocean /api/assign-pns",+      "digikey": {+        "pn": "296-46379-2-ND",+        "status": "found"+      },+      "mouser": {+        "pn": "595-TPS28225DRBR",+        "status": "found"+      }+    },+    "pins": [+      {+        "number": "1",+        "name": "UGATE",+        "type": "output",+        "description": "Upper gate drive sink/source output, connect to high-side N-Channel MOSFET gate."+      },+      {+        "number": "2",+        "name": "BOOT",+        "type": "bidirectional",+        "description": "Floating bootstrap supply pin for upper gate drive; connect bootstrap capacitor between this pin and PHASE pin."+      },+      {+        "number": "3",+        "name": "PWM",+        "type": "input",+        "description": "PWM control input supporting three distinct operating states."+      },+      {+        "number": "4",+        "name": "GND",+        "type": "power_in",+        "description": "Ground reference pin; all signals are referenced to this node."+      },+      {+        "number": "5",+        "name": "LGATE",+        "type": "output",+        "description": "Lower gate drive sink/source output, connect to low-side N-Channel MOSFET gate."+      },+      {+        "number": "6",+        "name": "VDD",+        "type": "power_in",+        "description": "5-V bias supply input; place high quality bypass capacitor from this pin to GND."+      },+      {+        "number": "7",+        "name": "EN/PG",+        "type": "bidirectional",+        "description": "Enable/power good input/output with 1-MΩ impedance; pull high to enable or low to disable (quiescent < 350-μA); internally pulled low on UVLO or over-temperature shutdown."+      },+      {+        "number": "8",+        "name": "PHASE",+        "type": "input",+        "description": "Phase node connected to upper MOSFET source and lower MOSFET drain; provides return path for upper gate driver."+      },+      {+        "number": "9",+        "name": "Thermal pad",+        "type": "passive",+        "description": "Exposed pad (from the footprint; not named in the datasheet pin table)."+      }+    ],+    "provenance": {+      "extractor": "extract_pins 0.3",+      "factory_chain": {+        "factory": "2.0.0",+        "extractor": "extract_pins 0.3",+        "primary_model": "claude-haiku-4-5-20251001",+        "primary_mode": "text",+        "consensus_model": "claude-sonnet-5-5",+        "consensus": "agreed",+        "guards": "pin_guards 0.1: passed",+        "guard_notes": [+          "extractor flagged: Exposed thermal die pad is mentioned in pin functions (Table 4-1) but not assigned a numbered pin de",+          "exposed pad 9 added from the footprint"+        ],+        "pages_sent": 9,+        "cost_usd": 0.1061,+        "at": "2026-10-03T04:35:22"+      },+      "datasheet": {+        "url": "https://www.ti.com/cn/lit/gpn/tps28225",+        "pages": 42,+        "sha256": "6b4cd5d2b7790f56",+        "source_tier": "lcsc"+      },+      "cad": "KiCad official (CC-BY-SA 4.0)",+      "pins": {+        "total": 9,+        "described": 9,+        "cites_pages": true,+        "refuses_to_fabricate": true+      }+    },+    "viewers": {+      "symbol": "viewers/symbol.html",+      "footprint": "viewers/footprint.html"+    }+  },+  "visibility": "public",+  "org": "adom",+  "author": {+    "name": "Ray",+    "email": "[email protected]"+  }+}\ No newline at end of file