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Ray Initial commit: component/tps259824lnrger 0346d4b 1d ago

TPS259824LNRGER

Texas Instruments · Supervisor And Reset ICs · VQFN-24(4x4)

TPS259824LNRGER from Texas Instruments, in a VQFN-24(4x4). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 IN power_in Power input to the eFuse; the operating input range is 2.7 V to 24 V, with an absolute maximum of 30 V.
2 IN power_in Power input to the eFuse; the operating input range is 2.7 V to 24 V, with an absolute maximum of 30 V.
3 IN power_in Power input to the eFuse; the operating input range is 2.7 V to 24 V, with an absolute maximum of 30 V.
4 GND power_in Ground connection to the system ground, used as the reference for all internal signals.
5 GND power_in Ground connection to the system ground, used as the reference for all internal signals.
6 EN/UVLO input Active-high enable with an external resistor divider from IN to GND to set the UVLO threshold; it must not be left floating and its absolute maximum is 7 V.
7 ITIMER output A capacitor to GND sets the overcurrent blanking interval; leave it open for the fastest response, and shorting it to GND triggers a device fault.
8 ILIM output A resistor to GND sets the output current-limit and fast-trip thresholds; the recommended RILIM range is 82 Ω to 1650 Ω and the pin must not be left floating.
9 IMON output Analog load-current monitor output that sources current proportional to the load current (gain 246 µA/A typical); a resistor to GND converts it to a voltage.
10 RETRY_DLY output A capacitor to GND sets the delay before an automatic restart attempt after a fault; connecting this pin to GND selects latch-off with no auto-retry.
11 NRETRY output A capacitor to GND sets the number of automatic restart attempts after a fault; connecting this pin to GND selects infinite retries.
12 LDSTRT input Load-detect/handshake input where a capacitor to GND sets the time window in which the load must pull this pin low after PG asserts; connect to GND if unused and do not leave it floating.
13 PG output Active-high power-good open-drain output that requires an external pull-up, is asserted when the FET is fully enhanced and the output reaches its maximum voltage, and is held low when VIN is below VUVP.
14 GND power_in Ground connection to the system ground, used as the reference for all internal signals.
15 dVdt output A capacitor to GND sets the output turn-on slew rate; leave it open for the fastest slew rate during startup.
16 IN power_in Power input to the eFuse; the operating input range is 2.7 V to 24 V, with an absolute maximum of 30 V.
17 OUT power_out Power output to the load; the device can carry a continuous switch current of up to 15 A from IN to OUT.
18 OUT power_out Power output to the load; the device can carry a continuous switch current of up to 15 A from IN to OUT.
19 OUT power_out Power output to the load; the device can carry a continuous switch current of up to 15 A from IN to OUT.
20 OUT power_out Power output to the load; the device can carry a continuous switch current of up to 15 A from IN to OUT.
21 OUT power_out Power output to the load; the device can carry a continuous switch current of up to 15 A from IN to OUT.
22 OUT power_out Power output to the load; the device can carry a continuous switch current of up to 15 A from IN to OUT.
23 OUT power_out Power output to the load; the device can carry a continuous switch current of up to 15 A from IN to OUT.
24 OUT power_out Power output to the load; the device can carry a continuous switch current of up to 15 A from IN to OUT.
25 EP passive Exposed pad (from the footprint; not named in the datasheet pin table).

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package VQFN-24(4x4)
Category Power Management (PMIC)
Pins 25

CAD (KiCad official)

  • Symbol: TPS259824LNRGER
  • Footprint: Package_DFN_QFN:QFN-24-1EP_4x4mm_P0.5mm_EP2.7x2.7mm
  • 3D model: VQFN-24(4x4) (KiCad packages3D, STEP)
  • 3D model files: tps259824lnrger-etched.step / tps259824lnrger-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tps259824lnrger.step / tps259824lnrger.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (55 pp, sha256 f4a0f06cfbd81f26, retrieved 2026-10-08, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF