component
TPS25940AQRVCTQ1
Public Made by Adomby adom
Texas Instruments Surge Protection Devices (SPDs), WQFN-20(4x3). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
Open in new tab ↗
Loads on click. Unloads only if this page sits in the background.
Symbol & Footprint
Schematic Symbol
Open full view ↗Loads on click. Unloads only if this page sits in the background.
PCB Footprint
Open full view ↗Loads on click. Unloads only if this page sits in the background.
Datasheet
Open in new tab ↗Loads on click. Unloads only if this page sits in the background.
README
markdownTPS25940AQRVCTQ1
Texas Instruments · Surge Protection Devices (SPDs) · WQFN-20(4x3)
TPS25940AQRVCTQ1 from Texas Instruments, in a WQFN-20(4x3). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | DEVSLP | input | Active-high DevSleep low-power mode control; rising threshold 1.6 V min / 1.85 V typ / 2.0 V max, falling 0.8 V min / 0.96 V typ / 1.1 V max; input leakage 0.6-1.25 µA; leave floating or connect to GND if unused. |
| 2 | PGOOD | output | Active-high open-drain power-good output; asserted high when PGTH > V(PGTHR) = 0.99 V (typ) and internal FET is fully enhanced; internal pull-down 10-35 Ω; max sink current 10 mA; leave floating if unused. |
| 3 | PGTH | input | Positive input of the internal power-good comparator; rising threshold V(PGTHR) = 0.97-1.01 V, falling V(PGTHF) = 0.90-0.94 V; leakage ±100 nA max; connect to OUT or GND if unused. |
| 4 | OUT | power_out | Switched power output; one of five paralleled OUT pins (4-8); total RON = 34-64 mΩ (-40 °C to +125 °C); max continuous switch current 4.78 A at TA = 85 °C; all OUT pins must be tied together and connected to the load. |
| 5 | OUT | power_out | Switched power output; paralleled with pins 4, 6, 7, 8; all OUT pins must be connected together and to the load. |
| 6 | OUT | power_out | Switched power output; paralleled with pins 4, 5, 7, 8; all OUT pins must be connected together and to the load. |
| 7 | OUT | power_out | Switched power output; paralleled with pins 4, 5, 6, 8; all OUT pins must be connected together and to the load. |
| 8 | OUT | power_out | Switched power output; paralleled with pins 4, 5, 6, 7; all OUT pins must be connected together and to the load. |
| 9 | IN | power_in | Power input and device supply voltage; operating range 2.7 V to 18 V (20 V abs max, 22 V for 10 ms transient); IQ(ON) = 140-270 µA; one of five paralleled IN pins (9-13); all IN pins must be connected together. |
| 10 | IN | power_in | Power input; paralleled with pins 9, 11, 12, 13; all IN pins must be connected together and to the power source. |
| 11 | IN | power_in | Power input; paralleled with pins 9, 10, 12, 13; all IN pins must be connected together and to the power source. |
| 12 | IN | power_in | Power input; paralleled with pins 9, 10, 11, 13; all IN pins must be connected together and to the power source. |
| 13 | IN | power_in | Power input; paralleled with pins 9, 10, 11, 12; all IN pins must be connected together and to the power source. |
| 14 | EN/UVLO | input | Enable and programmable undervoltage lockout input; FET turns off when V < V(ENF) = 0.92 V (typ); device enters low-IQ shutdown (IQ < 15 µA) when V < V(SHUTF) = 0.47 V (typ); pin must not be left floating; connect to IN if UVLO not needed. |
| 15 | OVP | input | Overvoltage protection threshold-setting input; FET opens and FLT asserts when V(OVP) > V(OVPR) = 0.99 V (typ); OVP disable delay 2 µs (typ); tie to GND when not used; leakage ±100 nA max. |
| 16 | GND | power_in | Ground reference for all voltages; must be connected to the exposed PowerPAD (pin 21); PowerPAD must be soldered to PCB ground plane with multiple vias for thermal performance; RθJCbot = 3.4 °C/W. |
| 17 | ILIM | passive | Current-limit programming pin; external resistor from ILIM to GND sets overload and short-circuit current limit via I(LIM) = 89 / R(ILIM); V(ILIM) bias = 0.87 V (typ); R(ILIM) range 16.9 kΩ to 150 kΩ corresponding to I(LIM) 5.3 A to 0.6 A (±8% accuracy). |
| 18 | dVdT | passive | Output voltage ramp-rate control pin; external capacitor from dVdT to GND sets output slew rate; I(dVdT) charging current = 1 µA (typ), V(dVdTmax) = 2.88 V (typ), GAIN(dVdT) = 11.9 V/V (typ); leave floating for internal 30 V/ms ramp; C(dVdT) up to 470 nF. |
| 19 | IMON | output | Analog current monitor output; sources a scaled current proportional to I(OUT) with GAIN(IMON) = 52.3 µA/A (typ), accuracy ±8% for TPS25940A-Q1; external resistor from IMON to GND converts to voltage; max output voltage min([V(IN) - 2.2 V], 6 V); leave floating if unused. |
| 20 | FLT | output | Active-low open-drain fault indicator; asserts low for undervoltage, overvoltage, reverse voltage (V(REVTH) = -66 mV typ), or thermal shutdown events; internal pull-down resistance 10-30 Ω; max sink current 10 mA; leave open or tie to GND if unused. |
| 21 | EP | power_in | Exposed PowerPAD (thermal pad); at GND potential; RθJCbot = 3.4 °C/W; must be soldered to PCB ground plane with multiple vias for optimal thermal and mechanical performance. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | WQFN-20(4x3) |
| Category | Circuit Protection |
| Pins | 21 |
CAD (KiCad official)
- Symbol:
TPS25940AQRVCTQ1 - Footprint:
Package_DFN_QFN:QFN-20-1EP_3x4mm_P0.5mm_EP1.65x2.65mm - 3D model: WQFN-20(4x3) (KiCad packages3D, STEP)
- 3D model files:
tps25940aqrvctq1-etched.step/tps25940aqrvctq1-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);tps25940aqrvctq1.step/tps25940aqrvctq1.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (51 pp, sha256
a1b7de698cb52759, retrieved 2026-09-26, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.2, primaryclaude-haiku-4-5-20251001(text), consensusclaude-sonnet-4-6(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).