component

TPS2399DGKR

Public Made by Adom

by adom

Texas Instruments Supervisor And Reset ICs, VSSOP-8-0.65mm. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componentpower management (pmic)tps2399dgkrfactory-2.0.0extractor-text
Overview Files Discover Packages Releases Dependencies Issues Breadcrumbs Pull Requests Activity
main
Download ZIP Propose a change
Generated by kicad-footprint-generator · KiCad file format 20260206
Name Last commit message Last updated
docs Publish 0.1.0 · Ray 1mo ago
viewers tps2399dgkr: viewers · Ray 1mo ago
package.json Publish 0.1.0 · Ray 1mo ago
page.json Set visibility: public · Ray 1mo ago
README.md Initial commit: component/tps2399dgkr · Ray 1mo ago
tps2399dgkr-etched.glb tps2399dgkr: factory component page (tier=mfr) · Ray 1mo ago
tps2399dgkr-etched.step tps2399dgkr: factory component page (tier=mfr) · Ray 1mo ago
tps2399dgkr-hero.glb tps2399dgkr: hero GLB from the etched model (keeps the MPN mark) · Ray 1mo ago
tps2399dgkr-hero.overlay.json Publish 0.1.0 · Ray 1mo ago
tps2399dgkr.glb Publish 0.1.0 · Ray 1mo ago
tps2399dgkr.kicad_mod Publish 0.1.0 · Ray 1mo ago
tps2399dgkr.kicad_sym Publish 0.1.0 · Ray 1mo ago
tps2399dgkr.lbr Publish 0.1.0 · Ray 1mo ago
tps2399dgkr.step Publish 0.1.0 · Ray 1mo ago

TPS2399DGKR

Texas Instruments · Supervisor And Reset ICs · VSSOP-8-0.65mm

TPS2399DGKR from Texas Instruments, in a VSSOP-8-0.65mm. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 PG output Open-drain, active-low power good output that is asserted only when the output is enabled, GATE has ramped to at least 7 V, and IRAMP exceeds about 5 V.
2 EN input Enable input referenced to -VIN; pulling it above the nominal 1.4-V threshold enables GATE and starts the load current ramp, while a low level disables the pass FET.
3 FLTTIME bidirectional Fault timeout programming pin; an external capacitor from FLTTIME to -VIN sets the fault timeout period, which is charged to the 4-V fault threshold during a fault.
4 IRAMP bidirectional Inrush slew rate programming pin; an external capacitor from IRAMP to -VIN sets the load current slew rate and is discharged when the output is disabled or a fault latches.
5 -VIN power_in Negative supply input and reference pin; the EN, ISENS, IRAMP and FLTTIME pins and all internal circuitry are referenced to it.
6 ISENS input Current sense input connected through a low-value sense resistor to -VIN; load current is regulated to a 40-mV reference, and a sense voltage above the 100-mV overload threshold pulls GATE low rapidly.
7 GATE output Gate drive output for the external N-channel pass FET, typically about 14 V when fully enhanced.
8 RTN power_in Positive supply input connected to the return node of the input power bus; the device is specified for input supply voltages of -36 V to -80 V.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package VSSOP-8-0.65mm
Category Power Management (PMIC)
Pins 8

CAD (KiCad official)

  • Symbol: TPS2399DGKR
  • Footprint: Package_SO:VSSOP-8_2.3x2mm_P0.5mm
  • 3D model: VSSOP-8-0.65mm (KiCad packages3D, STEP)
  • 3D model files: tps2399dgkr-etched.step / tps2399dgkr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tps2399dgkr.step / tps2399dgkr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (30 pp, sha256 2d3f49887517c851, retrieved 2026-10-08, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF