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Contents

Pinout
Key specifications
CAD (KiCad official)
Provenance

README

markdown

TPS2151IPWP

Texas Instruments · Power Distribution Switches · HTSSOP-14-EP

TPS2151IPWP from Texas Instruments, in a HTSSOP-14-EP. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	SW_PG	output	Active-high power-good output for the switch, a CMOS logic-level signal with no external pullup required that is pulled low when SW_OUT falls below 88% of 5 V for the TPS2151.
2	SW_IN	power_in	Input of the integrated N-channel high-side power switch, which has a maximum on-state resistance of 65 mΩ and is rated for 500 mA continuous current.
3	SW_IN	power_in	Input of the integrated N-channel high-side power switch (second SW_IN pin, internally tied to pin 2), which has a maximum on-state resistance of 65 mΩ and is rated for 500 mA continuous current.
4	LDO_IN	power_in	Input of the internal adjustable LDO, which supports 2.7 V to 5.5 V VIN, has a 0.5 V maximum dropout and is rated for 250 mA continuous current.
5	SW_EN	input	Active-high enable for the switch on the TPS2151, with an internal pulldown (this pin is active low on the TPS2140/41).
6	LDO_EN	input	Active-high enable signal for the LDO regulator, with no internal pullup or pulldown.
7	GND	power_in	Ground reference for the device.
8	LDO_PG	output	Open-drain, active-high power-good signal for the LDO output.
9	ADJ	input	Feedback adjustment input of the LDO regulator used to set the output voltage over the 0.9 V to 3.3 V adjustable range.
10	LDO_PLDN	input	Output pulldown pin for the LDO, used when connected to LDO_OUT to discharge the output.
11	LDO_OUT	power_out	Output of the adjustable LDO regulator, which is rated for 250 mA continuous current.
12	SW_OUT	power_out	Output of the internal power-distribution switch, which applies dual current limiting during turn-on and overload.
13	SW_OUT	power_out	Output of the internal power-distribution switch (second SW_OUT pin, internally tied to pin 12), which applies dual current limiting during turn-on and overload.
14	SW_PLDN	output	Open-drain discharge pin for the switch that is open when the switch is on and pulled to ground otherwise; connecting it to SW_OUT reduces the output fall time.
15	EP	passive	Exposed pad (from the footprint; not named in the datasheet pin table).

Key specifications

Parameter	Value
Manufacturer	Texas Instruments
Package	HTSSOP-14-EP
Category	Power Supply Chip
Pins	15

CAD (KiCad official)

Symbol: TPS2151IPWP
Footprint: Package_SO:TSSOP-14-1EP_4.4x5mm_P0.65mm
3D model: HTSSOP-14-EP (KiCad packages3D, STEP)
3D model files: tps2151ipwp-etched.step / tps2151ipwp-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tps2151ipwp.step / tps2151ipwp.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: Texas Instruments datasheet (33 pp, sha256 8316b929dcdd03f1, retrieved 2026-10-07, tier: lcsc)
Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF