component
TPS2062DR-1
Public Made by Adomby adom
Texas Instruments Power Distribution Switches, SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
main
TPS2062DR-1
Texas Instruments · Power Distribution Switches · SOIC-8
TPS2062DR-1 from Texas Instruments, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | GND | power_in | Ground connection; all device voltages are specified with respect to this pin. |
| 2 | IN | power_in | Input voltage, 2.7 V to 5.5 V recommended; connect a 0.1 µF or greater ceramic capacitor from IN to GND as close to the IC as possible. |
| 3 | EN1 | input | Enable input for channel 1, active-low so that a logic low turns on channel 1; input range 0 V to 5.5 V. |
| 4 | EN2 | input | Enable input for channel 2, active-high so that a logic high turns on channel 2; input range 0 V to 5.5 V. |
| 5 | OC2 | output | Active-low open-drain output asserted during over-current on channel 2; voltage range -0.3 V to 6 V. |
| 6 | OUT2 | power_out | Power-switch output for channel 2; continuous output current 0 to 1 A, internally limited. |
| 7 | OUT1 | power_out | Power-switch output for channel 1; continuous output current 0 to 1 A, internally limited. |
| 8 | OC1 | output | Active-low open-drain output asserted during over-current on channel 1; voltage range -0.3 V to 6 V. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SOIC-8 |
| Category | Power Management (PMIC) |
| Pins | 8 |
CAD (KiCad official)
- Symbol:
TPS2062DR-1 - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SOIC-8 (KiCad packages3D, STEP)
- 3D model files:
tps2062dr-1-etched.step/tps2062dr-1-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);tps2062dr-1.step/tps2062dr-1.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (43 pp, sha256
312a9d3c7cfe9d8f, retrieved 2026-10-08, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# TPS2062DR-1
**Texas Instruments** · Power Distribution Switches · SOIC-8
TPS2062DR-1 from Texas Instruments, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | GND | power_in | Ground connection; all device voltages are specified with respect to this pin. |
| 2 | IN | power_in | Input voltage, 2.7 V to 5.5 V recommended; connect a 0.1 µF or greater ceramic capacitor from IN to GND as close to the IC as possible. |
| 3 | EN1 | input | Enable input for channel 1, active-low so that a logic low turns on channel 1; input range 0 V to 5.5 V. |
| 4 | EN2 | input | Enable input for channel 2, active-high so that a logic high turns on channel 2; input range 0 V to 5.5 V. |
| 5 | OC2 | output | Active-low open-drain output asserted during over-current on channel 2; voltage range -0.3 V to 6 V. |
| 6 | OUT2 | power_out | Power-switch output for channel 2; continuous output current 0 to 1 A, internally limited. |
| 7 | OUT1 | power_out | Power-switch output for channel 1; continuous output current 0 to 1 A, internally limited. |
| 8 | OC1 | output | Active-low open-drain output asserted during over-current on channel 1; voltage range -0.3 V to 6 V. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SOIC-8 |
| Category | Power Management (PMIC) |
| Pins | 8 |
## CAD (KiCad official)
- Symbol: `TPS2062DR-1`
- Footprint: `Package_SO:SOIC-8_3.9x4.9mm_P1.27mm`
- 3D model: SOIC-8 (KiCad packages3D, STEP)
- 3D model files: `tps2062dr-1-etched.step` / `tps2062dr-1-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `tps2062dr-1.step` / `tps2062dr-1.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/tps2066-1) (43 pp, sha256 `312a9d3c7cfe9d8f`, retrieved 2026-10-08, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/tps2062dr-1-datasheet.pdf)