component
TPS2062DR-1
Public Made by Adomby adom
Texas Instruments Power Distribution Switches, SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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README.mdadded+44@@ -0,0 +1,44 @@+# TPS2062DR-1++**Texas Instruments** · Power Distribution Switches · SOIC-8++TPS2062DR-1 from Texas Instruments, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | GND | power_in | Ground connection; all device voltages are specified with respect to this pin. |+| 2 | IN | power_in | Input voltage, 2.7 V to 5.5 V recommended; connect a 0.1 µF or greater ceramic capacitor from IN to GND as close to the IC as possible. |+| 3 | EN1 | input | Enable input for channel 1, active-low so that a logic low turns on channel 1; input range 0 V to 5.5 V. |+| 4 | EN2 | input | Enable input for channel 2, active-high so that a logic high turns on channel 2; input range 0 V to 5.5 V. |+| 5 | OC2 | output | Active-low open-drain output asserted during over-current on channel 2; voltage range -0.3 V to 6 V. |+| 6 | OUT2 | power_out | Power-switch output for channel 2; continuous output current 0 to 1 A, internally limited. |+| 7 | OUT1 | power_out | Power-switch output for channel 1; continuous output current 0 to 1 A, internally limited. |+| 8 | OC1 | output | Active-low open-drain output asserted during over-current on channel 1; voltage range -0.3 V to 6 V. |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | Texas Instruments |+| Package | SOIC-8 |+| Category | Power Management (PMIC) |+| Pins | 8 |++## CAD (KiCad official)++- Symbol: `TPS2062DR-1`+- Footprint: `Package_SO:SOIC-8_3.9x4.9mm_P1.27mm`+- 3D model: SOIC-8 (KiCad packages3D, STEP)+- 3D model files: `tps2062dr-1-etched.step` / `tps2062dr-1-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `tps2062dr-1.step` / `tps2062dr-1.glb` are the bare package body.++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/tps2066-1) (43 pp, sha256 `312a9d3c7cfe9d8f`, retrieved 2026-10-08, tier: lcsc)+- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/tps2062dr-1-datasheet.pdf)
page.jsonadded+200@@ -0,0 +1,200 @@+{+ "slug": "tps2062dr-1",+ "version": "0.1.0",+ "type": "component",+ "description": "Texas Instruments Power Distribution Switches, SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",+ "tags": [+ "component",+ "power management (pmic)",+ "tps2062dr-1",+ "factory-2.0.0",+ "extractor-text"+ ],+ "dependencies": {},+ "hero": {+ "type": "image",+ "path": "docs/hero.png"+ },+ "files": [+ "page.json",+ "README.md",+ "tps2062dr-1.kicad_sym",+ "tps2062dr-1.kicad_mod",+ "tps2062dr-1.glb",+ "tps2062dr-1.step",+ "tps2062dr-1.lbr",+ "docs/hero.png",+ "docs/tps2062dr-1-datasheet.pdf",+ "viewers/symbol.html",+ "viewers/footprint.html",+ "tps2062dr-1-hero.glb",+ "tps2062dr-1-hero.overlay.json"+ ],+ "component": {+ "mpn": "TPS2062DR-1",+ "manufacturer": "Texas Instruments",+ "package": "SOIC-8",+ "pin_count": 8,+ "category": "Power Management (PMIC)",+ "subcategory": "Power Distribution Switches",+ "datasheet": "https://www.ti.com/cn/lit/gpn/tps2066-1",+ "parts": {+ "symbol": "tps2062dr-1.kicad_sym",+ "footprint": "tps2062dr-1.kicad_mod",+ "model_3d": "tps2062dr-1-hero.glb",+ "model_3d_plain": "tps2062dr-1.glb",+ "model_3d_step": "tps2062dr-1-etched.step",+ "model_3d_step_plain": "tps2062dr-1.step",+ "lbr": "tps2062dr-1.lbr"+ },+ "distributor_links": {+ "lcsc": "C2867645",+ "digikey": "296-21658-2-ND",+ "mouser": "595-TPS2062DR-1"+ },+ "distributor_check": {+ "checked_at": "2026-10-08T16:46:15Z",+ "source": "Component Ocean /api/assign-pns",+ "digikey": {+ "pn": "296-21658-2-ND",+ "status": "found",+ "lifecycle": "Active"+ },+ "mouser": {+ "pn": "595-TPS2062DR-1",+ "status": "found"+ }+ },+ "pins": [+ {+ "number": "1",+ "name": "GND",+ "type": "power_in",+ "description": "Ground connection; all device voltages are specified with respect to this pin."+ },+ {+ "number": "2",+ "name": "IN",+ "type": "power_in",+ "description": "Input voltage, 2.7 V to 5.5 V recommended; connect a 0.1 µF or greater ceramic capacitor from IN to GND as close to the IC as possible."+ },+ {+ "number": "3",+ "name": "EN1",+ "type": "input",+ "description": "Enable input for channel 1, active-low so that a logic low turns on channel 1; input range 0 V to 5.5 V."+ },+ {+ "number": "4",+ "name": "EN2",+ "type": "input",+ "description": "Enable input for channel 2, active-high so that a logic high turns on channel 2; input range 0 V to 5.5 V."+ },+ {+ "number": "5",+ "name": "OC2",+ "type": "output",+ "description": "Active-low open-drain output asserted during over-current on channel 2; voltage range -0.3 V to 6 V."+ },+ {+ "number": "6",+ "name": "OUT2",+ "type": "power_out",+ "description": "Power-switch output for channel 2; continuous output current 0 to 1 A, internally limited."+ },+ {+ "number": "7",+ "name": "OUT1",+ "type": "power_out",+ "description": "Power-switch output for channel 1; continuous output current 0 to 1 A, internally limited."+ },+ {+ "number": "8",+ "name": "OC1",+ "type": "output",+ "description": "Active-low open-drain output asserted during over-current on channel 1; voltage range -0.3 V to 6 V."+ }+ ],+ "provenance": {+ "extractor": "extract_pins 0.3",+ "factory_chain": {+ "factory": "2.0.0",+ "extractor": "extract_pins 0.3",+ "primary_model": "claude-haiku-5-5",+ "primary_mode": "text",+ "consensus_model": "claude-sonnet-5-5",+ "consensus": "agreed",+ "guards": "pin_guards 0.1: passed",+ "guard_notes": [+ "extractor flagged: The OC2 row in the page 3 pin table has only two values in the extracted text (\"OC2 5 5 O\") instead ; The page 3 pinout figure is not legible in the extracted text. The pin numbers come from the pin-fun; The datasheet marks IN and OUTx as generic I/O (I/O column). Power classes power_in and power_out we"+ ],+ "pages_sent": 7,+ "cost_usd": 0.0507,+ "at": "2026-10-08T16:45:55"+ },+ "datasheet": {+ "url": "https://www.ti.com/cn/lit/gpn/tps2066-1",+ "pages": 43,+ "sha256": "312a9d3c7cfe9d8f",+ "source_tier": "lcsc"+ },+ "cad": "KiCad official (CC-BY-SA 4.0)",+ "pins": {+ "total": 8,+ "described": 8,+ "cites_pages": true,+ "refuses_to_fabricate": true+ }+ },+ "viewers": {+ "symbol": "viewers/symbol.html",+ "footprint": "viewers/footprint.html"+ },+ "models_3d": [+ {+ "file": "tps2062dr-1.step",+ "role": "plain",+ "up": "Z",+ "units": "mm",+ "origin": "footprint origin = pad-pattern centre",+ "seat": "z = 0",+ "extents_mm": [+ 6,+ 4.9,+ 1.75+ ],+ "zmin_mm": 0,+ "centre_offset_mm": 0,+ "footprint_binding": "identity",+ "sha256": "07f46cff378d30e6c27dfd5a03092c795323f86d91c71fc7e743f4f418dc553a",+ "checked": "2026-10-08",+ "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+ },+ {+ "file": "tps2062dr-1-etched.step",+ "role": "eda",+ "up": "Z",+ "units": "mm",+ "origin": "footprint origin = pad-pattern centre",+ "seat": "z = 0",+ "extents_mm": [+ 6,+ 4.9,+ 1.75+ ],+ "zmin_mm": 0,+ "centre_offset_mm": 0,+ "footprint_binding": "identity",+ "sha256": "2a74138da94004f0e65bf90c1ad8f543ab3d8bf6230d755d069d91619ad4efbd",+ "checked": "2026-10-08",+ "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+ }+ ]+ },+ "visibility": "public",+ "org": "adom",+ "author": {+ "name": "Ray",+ "email": "[email protected]"+ }+}