TPS1120DR

{
  "schema_version": 1,
  "type": "component",
  "slug": "tps1120dr",
  "title": "TPS1120DR",
  "brief": "Texas Instruments MOSFETs, SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
  "version": "0.1.0",
  "license": "CC-BY-SA-4.0",
  "tags": [
    "component",
    "transistors-thyristors",
    "tps1120dr",
    "factory-2.0.0",
    "extractor-text"
  ],
  "component": {
    "mpn": "TPS1120DR",
    "manufacturer": "Texas Instruments",
    "package": "SOIC-8",
    "pin_count": 8,
    "category": "Transistors/Thyristors",
    "subcategory": "MOSFETs",
    "datasheet": "https://www.ti.com/lit/ds/symlink/tps1120.pdf",
    "parts": {
      "symbol": "tps1120dr.kicad_sym",
      "footprint": "tps1120dr.kicad_mod",
      "model_3d": "tps1120dr-hero.glb",
      "model_3d_plain": "tps1120dr.glb",
      "model_3d_step": "tps1120dr-etched.step",
      "model_3d_step_plain": "tps1120dr.step",
      "lbr": "tps1120dr.lbr"
    },
    "distributor_links": {
      "lcsc": "C44654",
      "digikey": "296-1352-2-ND",
      "mouser": "595-TPS1120DR"
    },
    "distributor_check": {
      "checked_at": "2026-10-08T20:23:23Z",
      "source": "Component Ocean /api/assign-pns",
      "digikey": {
        "pn": "296-1352-2-ND",
        "status": "found",
        "lifecycle": "Active"
      },
      "mouser": {
        "pn": "595-TPS1120DR",
        "status": "found"
      }
    },
    "pins": [
      {
        "number": "1",
        "name": "1SOURCE",
        "type": "passive",
        "description": "Source terminal of MOSFET 1; the lead is internally tied to the MOSFET 1 source heat sink, and the datasheet gives no separate current limit for this pin."
      },
      {
        "number": "2",
        "name": "1GATE",
        "type": "input",
        "description": "Gate of MOSFET 1; TTL and CMOS compatible input with VGS(th) of -1.5 V maximum."
      },
      {
        "number": "3",
        "name": "2SOURCE",
        "type": "passive",
        "description": "Source terminal of MOSFET 2; the lead is internally tied to the MOSFET 2 source heat sink, and the datasheet gives no separate current limit for this pin."
      },
      {
        "number": "4",
        "name": "2GATE",
        "type": "input",
        "description": "Gate of MOSFET 2; TTL and CMOS compatible input with VGS(th) of -1.5 V maximum."
      },
      {
        "number": "5",
        "name": "2DRAIN",
        "type": "passive",
        "description": "Drain of MOSFET 2; for all applications both drain pins of each device should be connected together."
      },
      {
        "number": "6",
        "name": "2DRAIN",
        "type": "passive",
        "description": "Drain of MOSFET 2; for all applications both drain pins of each device should be connected together."
      },
      {
        "number": "7",
        "name": "1DRAIN",
        "type": "passive",
        "description": "Drain of MOSFET 1; for all applications both drain pins of each device should be connected together."
      },
      {
        "number": "8",
        "name": "1DRAIN",
        "type": "passive",
        "description": "Drain of MOSFET 1; for all applications both drain pins of each device should be connected together."
      }
    ],
    "provenance": {
      "extractor": "extract_pins 0.3",
      "factory_chain": {
        "factory": "2.0.0",
        "extractor": "extract_pins 0.3",
        "primary_model": "claude-haiku-5-5",
        "primary_mode": "text",
        "consensus_model": "claude-sonnet-5-5",
        "consensus": "agreed",
        "guards": "pin_guards 0.1: passed",
        "guard_notes": [
          "extractor flagged: The pin numbers were inferred from the page 1 text extraction, which lists pins 1-4 on the left and ; The 2DRAIN and 1DRAIN pairs are shown as identical labels, so pins 5/6 and 7/8 are assigned by posit; The absolute maximum gate-to-source voltage is garbled in the extracted text as 'VGS 2 or –15 V', so"
        ],
        "pages_sent": 17,
        "cost_usd": 0.0714,
        "at": "2026-10-08T20:22:34"
      },
      "datasheet": {
        "url": "https://www.ti.com/lit/ds/symlink/tps1120.pdf",
        "pages": 17,
        "sha256": "12ce794c05f16c80",
        "source_tier": "mfr"
      },
      "cad": "KiCad official (CC-BY-SA 4.0)",
      "pins": {
        "total": 8,
        "described": 8,
        "cites_pages": true,
        "refuses_to_fabricate": true
      }
    },
    "viewers": {
      "symbol": "viewers/symbol.html",
      "footprint": "viewers/footprint.html"
    },
    "models_3d": [
      {
        "file": "tps1120dr.step",
        "role": "plain",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          6,
          4.9,
          1.75
        ],
        "zmin_mm": 0,
        "centre_offset_mm": 0,
        "footprint_binding": "identity",
        "sha256": "07f46cff378d30e6c27dfd5a03092c795323f86d91c71fc7e743f4f418dc553a",
        "checked": "2026-10-08",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      },
      {
        "file": "tps1120dr-etched.step",
        "role": "eda",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          6,
          4.9,
          1.75
        ],
        "zmin_mm": 0,
        "centre_offset_mm": 0,
        "footprint_binding": "identity",
        "sha256": "f43d4b10386bcb4cfcf565fb74502013c8a40ed4ae0566926cf4d1c68b441f60",
        "checked": "2026-10-08",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      }
    ]
  },
  "metadata": {
    "specs": {
      "Manufacturer": "Texas Instruments",
      "Package": "SOIC-8",
      "Category": "Transistors/Thyristors",
      "Pins": "8"
    }
  },
  "variants": [],
  "sections": [
    "hero",
    "viewers",
    "readme",
    "breadcrumbs",
    "info"
  ],
  "discovery_triggers": [
    "tps1120dr"
  ],
  "discovery_pitch": "TPS1120DR (Texas Instruments) component page: datasheet pinout, KiCad symbol, footprint and 3D.",
  "author": {
    "name": "Ray",
    "email": "[email protected]"
  },
  "dependencies": {},
  "hero": {
    "type": "image",
    "path": "docs/hero.png"
  },
  "files": [
    "page.json",
    "README.md",
    "tps1120dr.kicad_sym",
    "tps1120dr.kicad_mod",
    "tps1120dr.glb",
    "tps1120dr.step",
    "tps1120dr.lbr",
    "docs/hero.png",
    "docs/tps1120dr-datasheet.pdf",
    "viewers/symbol.html",
    "viewers/footprint.html",
    "tps1120dr-hero.glb",
    "tps1120dr-hero.overlay.json"
  ],
  "visibility": {
    "public": true
  }
}