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Contents

README

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TPM40NB8S8

TECH PUBLIC · MOSFETs · SOP-8

TPM40NB8S8 from TECH PUBLIC, in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 S1 passive Source of MOSFET 1 (N-channel, VDS 40V, ID 8A).
2 G1 input Gate of MOSFET 1, rated for VGS ±20V with threshold 1.2 to 2.5V.
3 S2 passive Source of MOSFET 2 (N-channel, VDS 40V, ID 8A).
4 G2 input Gate of MOSFET 2, rated for VGS ±20V with threshold 1.2 to 2.5V.
5 D2 passive Drain of MOSFET 2, rated for 40V drain-source voltage.
6 D2 passive Drain of MOSFET 2, rated for 40V drain-source voltage (shorted to pin 5 externally).
7 D1 passive Drain of MOSFET 1, rated for 40V drain-source voltage.
8 D1 passive Drain of MOSFET 1, rated for 40V drain-source voltage (shorted to pin 7 externally).

Key specifications

Parameter Value
Manufacturer TECH PUBLIC
Package SOP-8
Category Transistors/Thyristors
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Drain-Source Voltage VDS 40 V Tc=25°C unless otherwise noted 1
Gate-Source Voltage VGS -20 20 V Tc=25°C unless otherwise noted 1
Drain Current - Continuous ID 8 A TA=25°C 1
Drain Current - Continuous ID 6.4 A TA=70°C 1
Drain Current - Pulsed IDM 32 A Tc=25°C unless otherwise noted 1
Single Pulse Avalanche Energy EAS 4.9 mJ Tc=25°C unless otherwise noted 1
Single Pulse Avalanche Current IAS 9.9 A Tc=25°C unless otherwise noted 1
Power Dissipation PD 2 W TA=25°C 1
Power Dissipation - Derate PD 0.016 W/°C Derate above 25°C 1
Storage Temperature Range TSTG -50 150 °C Tc=25°C unless otherwise noted 1
Operating Junction Temperature Range TJ -50 150 °C Tc=25°C unless otherwise noted 1
Drain-Source Breakdown Voltage BVDSS 40 V VGS=0V, ID=250uA 2
Drain-Source Leakage Current IDSS 1 uA VDS=40V, VGS=0V, TJ=25°C 2
Drain-Source Leakage Current IDSS 10 uA VDS=32V, VGS=0V, TJ=125°C 2
Gate-Source Leakage Current IGSS -100 100 nA VGS=±20V, VDS=0V 2
Static Drain-Source On-Resistance RDS(ON) 20 mΩ VGS=10V, ID=8A 2
Static Drain-Source On-Resistance RDS(ON) 25 mΩ VGS=4.5V, ID=4A 2
Gate Threshold Voltage VGS(th) 1.2 1.6 2.5 V VGS=VDS, ID=250uA 2
Gate-Source Charge Qgs 1.6 3.2 nC VDS=32V, VGS=10V, ID=3A 2
Gate-Drain Charge Qgd 3.3 6.6 nC VDS=32V, VGS=10V, ID=3A 2
Turn-On Delay Time Td(on) 38 76 ns VDD=15V, VGS=10V, RG=3.3Ω, ID=1A 2
Rise Time Tr 10.5 21 ns VDD=15V, VGS=10V, RG=3.3Ω, ID=1A 2
Turn-Off Delay Time Td(off) 22.2 45 ns VDD=15V, VGS=10V, RG=3.3Ω, ID=1A 2
Fall Time Tf 6.6 13.2 ns VDD=15V, VGS=10V, RG=3.3Ω, ID=1A 2
Input Capacitance Ciss 724 1450 pF VDS=25V, VGS=0V, F=1MHz 2
Output Capacitance Coss 70 140 pF VDS=25V, VGS=0V, F=1MHz 2
Reverse Transfer Capacitance Crss 109 220 pF VDS=25V, VGS=0V, F=1MHz 2
Continuous Source Current IS 8 A VG=VD=0V, Force Current 2
Pulsed Source Current ISM 16 A VG=VD=0V, Force Current 2
Diode Forward Voltage VSD 1 V VGS=0V, IS=1A, TJ=25°C 2

CAD (KiCad official)

  • Symbol: TPM40NB8S8
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOP-8 (KiCad packages3D, STEP)
  • 3D model files: tpm40nb8s8-etched.step / tpm40nb8s8-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tpm40nb8s8.step / tpm40nb8s8.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: TECH PUBLIC datasheet (4 pp, sha256 9057f44f1477b4e1, retrieved 2026-10-18, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text+vision), consensus claude-opus-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF