component
TPIC6595N
Public Made by Adomby adom
Texas Instruments Shifting Register, PDIP-20. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
main
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{
"slug": "tpic6595n",
"version": "0.1.0",
"type": "component",
"description": "Texas Instruments Shifting Register, PDIP-20. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
"tags": [
"component",
"logic ics",
"tpic6595n",
"factory-2.0.0",
"extractor-text"
],
"dependencies": {},
"hero": {
"type": "image",
"path": "docs/hero.png"
},
"files": [
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"README.md",
"tpic6595n.kicad_sym",
"tpic6595n.kicad_mod",
"tpic6595n.glb",
"tpic6595n.step",
"tpic6595n.lbr",
"docs/hero.png",
"docs/tpic6595n-datasheet.pdf",
"viewers/symbol.html",
"viewers/footprint.html",
"tpic6595n-hero.glb",
"tpic6595n-hero.overlay.json",
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],
"component": {
"mpn": "TPIC6595N",
"manufacturer": "Texas Instruments",
"package": "PDIP-20",
"pin_count": 20,
"category": "Logic ICs",
"subcategory": "Shifting Register",
"datasheet": "https://www.ti.com/lit/ds/symlink/tpic6595n.pdf",
"parts": {
"symbol": "tpic6595n.kicad_sym",
"footprint": "tpic6595n.kicad_mod",
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"model_3d_plain": "tpic6595n-etched.glb",
"model_3d_step": "tpic6595n-etched.step",
"model_3d_step_plain": "tpic6595n.step",
"lbr": "tpic6595n.lbr"
},
"distributor_links": {
"lcsc": "C2861822",
"digikey": "296-1954-5-ND",
"mouser": "595-TPIC6595N"
},
"distributor_check": {
"checked_at": "2026-10-31T00:17:49Z",
"source": "Component Ocean /api/assign-pns",
"digikey": {
"pn": "296-1954-5-ND",
"status": "found",
"lifecycle": "Active"
},
"mouser": {
"pn": "595-TPIC6595N",
"status": "found"
}
},
"pins": [
{
"number": "1",
"name": "PGND",
"type": "power_in",
"description": "Power ground for the DMOS output drivers; internally connected to pins 10, 11, and 20 and must be externally connected to power system ground to minimize parasitic inductance."
},
{
"number": "2",
"name": "VCC",
"type": "power_in",
"description": "Logic supply voltage, recommended 4.5 V to 5.5 V (absolute maximum 7 V with respect to LGND and PGND)."
},
{
"number": "3",
"name": "SER IN",
"type": "input",
"description": "Serial data input to the 8-bit shift register, clocked on the rising edge of SRCK with 10 ns minimum setup and hold times; logic-high input must be at least 0.85 VCC and logic-low at most 0.15 VCC."
},
{
"number": "4",
"name": "DRAIN0",
"type": "output",
"description": "Open-drain power DMOS sink output rated 45 V drain-to-source with 250 mA continuous sink current per output."
},
{
"number": "5",
"name": "DRAIN1",
"type": "output",
"description": "Open-drain power DMOS sink output rated 45 V drain-to-source with 250 mA continuous sink current per output."
},
{
"number": "6",
"name": "DRAIN2",
"type": "output",
"description": "Open-drain power DMOS sink output rated 45 V drain-to-source with 250 mA continuous sink current per output."
},
{
"number": "7",
"name": "DRAIN3",
"type": "output",
"description": "Open-drain power DMOS sink output rated 45 V drain-to-source with 250 mA continuous sink current per output."
},
{
"number": "8",
"name": "SRCLR",
"type": "input",
"description": "Active-low shift-register clear: when low the input shift register is cleared, and when high the storage register transfers data to the output buffer."
},
{
"number": "9",
"name": "G",
"type": "input",
"description": "Output enable: when held high all output buffer data is forced low and all drain outputs are off; when held low storage register data is transparent to the outputs."
},
{
"number": "10",
"name": "PGND",
"type": "power_in",
"description": "Power ground; internally connected to pins 1, 11, and 20 and must be externally tied to power system ground."
},
{
"number": "11",
"name": "PGND",
"type": "power_in",
"description": "Power ground; internally connected to pins 1, 10, and 20 and must be externally tied to power system ground."
},
{
"number": "12",
"name": "RCK",
"type": "input",
"description": "Register clock; data transfers from the shift register to the 8-bit storage register on its rising edge."
},
{
"number": "13",
"name": "SRCK",
"type": "input",
"description": "Shift-register clock; data transfers through the shift register on its rising edge, with 10 ns minimum setup and hold relative to SER IN and a 20 ns minimum pulse duration."
},
{
"number": "14",
"name": "DRAIN4",
"type": "output",
"description": "Open-drain power DMOS sink output rated 45 V drain-to-source with 250 mA continuous sink current per output."
},
{
"number": "15",
"name": "DRAIN5",
"type": "output",
"description": "Open-drain power DMOS sink output rated 45 V drain-to-source with 250 mA continuous sink current per output."
},
{
"number": "16",
"name": "DRAIN6",
"type": "output",
"description": "Open-drain power DMOS sink output rated 45 V drain-to-source with 250 mA continuous sink current per output."
},
{
"number": "17",
"name": "DRAIN7",
"type": "output",
"description": "Open-drain power DMOS sink output rated 45 V drain-to-source with 250 mA continuous sink current per output."
},
{
"number": "18",
"name": "SER OUT",
"type": "output",
"description": "Serial data output from the shift register, provided to cascade data to additional devices."
},
{
"number": "19",
"name": "LGND",
"type": "power_in",
"description": "Logic ground; must be connected in a single-point connection to power grounds pins 1, 10, 11, and 20 in a manner that reduces crosstalk between logic and load circuits."
},
{
"number": "20",
"name": "PGND",
"type": "power_in",
"description": "Power ground; internally connected to pins 1, 10, and 11 and must be externally tied to power system ground."
}
],
"provenance": {
"extractor": "extract_pins 0.3",
"factory_chain": {
"factory": "2.0.0",
"extractor": "extract_pins 0.3",
"primary_model": "claude-haiku-5-5",
"primary_mode": "text",
"consensus_model": "claude-sonnet-5-5",
"consensus": "agreed",
"guards": "pin_guards 0.1: passed",
"guard_notes": [
"extractor flagged: The N (PDIP-20) package pinout was taken from the TOP VIEW figure on page 1 and cross-checked agains; The DRAIN outputs are open-drain DMOS sinks, but the KiCad ERC class list used here has no open-drai",
"1/20 pins cited to the wrong page (name found elsewhere): ['5:DRAIN1@p1']"
],
"pages_sent": 19,
"cost_usd": 0.0773,
"at": "2026-10-31T00:17:41"
},
"datasheet": {
"url": "https://www.ti.com/lit/ds/symlink/tpic6595n.pdf",
"pages": 19,
"sha256": "fa207d32fc5054c8",
"source_tier": "mfr"
},
"cad": "KiCad official (CC-BY-SA 4.0)",
"pins": {
"total": 20,
"described": 20,
"cites_pages": true,
"refuses_to_fabricate": true
}
},
"viewers": {
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"footprint": "viewers/footprint.html"
},
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"units": "mm",
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"seat": "body on z = 0, through-hole leads below",
"extents_mm": [
7.874,
26.162,
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"zmin_mm": -3.3,
"centre_offset_mm": 0.0,
"footprint_binding": "identity",
"sha256": "ca359c9b9e0ce94efcb6c96866513f659eef6517d629ace3c4a0a779f6fd57bb",
"checked": "2026-10-31",
"checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
},
{
"file": "tpic6595n-etched.step",
"role": "eda",
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}