main
Ray Publish 0.1.0 107a0af 16h ago
{
  "slug": "tpic6273n",
  "version": "0.1.0",
  "type": "component",
  "description": "Texas Instruments Latches, PDIP-20. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
  "tags": [
    "component",
    "logic ics",
    "tpic6273n",
    "factory-2.0.0",
    "extractor-text"
  ],
  "dependencies": {},
  "hero": {
    "type": "image",
    "path": "docs/hero.png"
  },
  "files": [
    "page.json",
    "README.md",
    "tpic6273n.kicad_sym",
    "tpic6273n.kicad_mod",
    "tpic6273n.glb",
    "tpic6273n.step",
    "tpic6273n.lbr",
    "docs/hero.png",
    "docs/tpic6273n-datasheet.pdf",
    "viewers/symbol.html",
    "viewers/footprint.html",
    "tpic6273n-hero.glb",
    "tpic6273n-hero.overlay.json",
    "tpic6273n-etched.glb"
  ],
  "component": {
    "mpn": "TPIC6273N",
    "manufacturer": "Texas Instruments",
    "package": "PDIP-20",
    "pin_count": 20,
    "category": "Logic ICs",
    "subcategory": "Latches",
    "datasheet": "https://www.ti.com/lit/ds/symlink/tpic6273n.pdf",
    "parts": {
      "symbol": "tpic6273n.kicad_sym",
      "footprint": "tpic6273n.kicad_mod",
      "model_3d": "tpic6273n-hero.glb",
      "model_3d_plain": "tpic6273n-etched.glb",
      "model_3d_step": "tpic6273n-etched.step",
      "model_3d_step_plain": "tpic6273n.step",
      "lbr": "tpic6273n.lbr"
    },
    "distributor_links": {
      "lcsc": "C1523284",
      "digikey": "296-1953-5-ND",
      "mouser": "595-TPIC6273N"
    },
    "distributor_check": {
      "checked_at": "2026-10-30T22:49:13Z",
      "source": "Component Ocean /api/assign-pns",
      "digikey": {
        "pn": "296-1953-5-ND",
        "status": "found",
        "lifecycle": "Active"
      },
      "mouser": {
        "pn": "595-TPIC6273N",
        "status": "found"
      }
    },
    "pins": [
      {
        "number": "1",
        "name": "CLR",
        "type": "input",
        "description": "Asynchronous clear input that the datasheet says is provided to turn all eight DMOS-transistor outputs off."
      },
      {
        "number": "2",
        "name": "D1",
        "type": "input",
        "description": "Data input for channel 1, transferred to DRAIN1 on the positive-going CLK edge when the 10 ns setup and 15 ns hold times are met."
      },
      {
        "number": "3",
        "name": "D2",
        "type": "input",
        "description": "Data input for channel 2, transferred to DRAIN2 on the positive-going CLK edge when the 10 ns setup and 15 ns hold times are met."
      },
      {
        "number": "4",
        "name": "DRAIN1",
        "type": "output",
        "description": "Open-drain power DMOS output of channel 1, rated for 250 mA continuous and 1.5 A pulsed drain current with a 45 V drain-source breakdown."
      },
      {
        "number": "5",
        "name": "DRAIN2",
        "type": "output",
        "description": "Open-drain power DMOS output of channel 2, rated for 250 mA continuous and 1.5 A pulsed drain current with a 45 V drain-source breakdown."
      },
      {
        "number": "6",
        "name": "DRAIN3",
        "type": "output",
        "description": "Open-drain power DMOS output of channel 3, rated for 250 mA continuous and 1.5 A pulsed drain current with a 45 V drain-source breakdown."
      },
      {
        "number": "7",
        "name": "DRAIN4",
        "type": "output",
        "description": "Open-drain power DMOS output of channel 4, rated for 250 mA continuous and 1.5 A pulsed drain current with a 45 V drain-source breakdown."
      },
      {
        "number": "8",
        "name": "D3",
        "type": "input",
        "description": "Data input for channel 3, transferred to DRAIN3 on the positive-going CLK edge when the 10 ns setup and 15 ns hold times are met."
      },
      {
        "number": "9",
        "name": "D4",
        "type": "input",
        "description": "Data input for channel 4, transferred to DRAIN4 on the positive-going CLK edge when the 10 ns setup and 15 ns hold times are met."
      },
      {
        "number": "10",
        "name": "GND",
        "type": "power_in",
        "description": "Ground reference for all voltages; each power DMOS source is internally connected to GND."
      },
      {
        "number": "11",
        "name": "CLK",
        "type": "input",
        "description": "Clock input whose positive-going edge latches the D inputs to the DRAIN outputs, with a minimum pulse duration of 25 ns."
      },
      {
        "number": "12",
        "name": "D5",
        "type": "input",
        "description": "Data input for channel 5, transferred to DRAIN5 on the positive-going CLK edge when the 10 ns setup and 15 ns hold times are met."
      },
      {
        "number": "13",
        "name": "D6",
        "type": "input",
        "description": "Data input for channel 6, transferred to DRAIN6 on the positive-going CLK edge when the 10 ns setup and 15 ns hold times are met."
      },
      {
        "number": "14",
        "name": "DRAIN5",
        "type": "output",
        "description": "Open-drain power DMOS output of channel 5, rated for 250 mA continuous and 1.5 A pulsed drain current with a 45 V drain-source breakdown."
      },
      {
        "number": "15",
        "name": "DRAIN6",
        "type": "output",
        "description": "Open-drain power DMOS output of channel 6, rated for 250 mA continuous and 1.5 A pulsed drain current with a 45 V drain-source breakdown."
      },
      {
        "number": "16",
        "name": "DRAIN7",
        "type": "output",
        "description": "Open-drain power DMOS output of channel 7, rated for 250 mA continuous and 1.5 A pulsed drain current with a 45 V drain-source breakdown."
      },
      {
        "number": "17",
        "name": "DRAIN8",
        "type": "output",
        "description": "Open-drain power DMOS output of channel 8, rated for 250 mA continuous and 1.5 A pulsed drain current with a 45 V drain-source breakdown."
      },
      {
        "number": "18",
        "name": "D7",
        "type": "input",
        "description": "Data input for channel 7, transferred to DRAIN7 on the positive-going CLK edge when the 10 ns setup and 15 ns hold times are met."
      },
      {
        "number": "19",
        "name": "D8",
        "type": "input",
        "description": "Data input for channel 8, transferred to DRAIN8 on the positive-going CLK edge when the 10 ns setup and 15 ns hold times are met."
      },
      {
        "number": "20",
        "name": "VCC",
        "type": "power_in",
        "description": "Logic supply voltage, recommended 4.5 V to 5.5 V, with an absolute maximum of 7 V."
      }
    ],
    "provenance": {
      "extractor": "extract_pins 0.3",
      "factory_chain": {
        "factory": "2.0.0",
        "extractor": "extract_pins 0.3",
        "primary_model": "claude-haiku-5-5",
        "primary_mode": "text",
        "consensus_model": "claude-sonnet-5-5",
        "consensus": "agreed",
        "guards": "pin_guards 0.1: passed",
        "guard_notes": [
          "extractor flagged: The pinout is taken from the single top-view drawing labeled 'DW OR N PACKAGE', which is shared by t; The function table text is garbled in the extracted datasheet, and the CLR description ('When clear ; The datasheet describes DRAIN outputs as open-drain power DMOS transistors; I classed them as 'outpu"
        ],
        "pages_sent": 18,
        "cost_usd": 0.0713,
        "at": "2026-10-30T22:49:04"
      },
      "datasheet": {
        "url": "https://www.ti.com/lit/ds/symlink/tpic6273n.pdf",
        "pages": 18,
        "sha256": "1b9dd1de09932ea8",
        "source_tier": "mfr"
      },
      "cad": "KiCad official (CC-BY-SA 4.0)",
      "pins": {
        "total": 20,
        "described": 20,
        "cites_pages": true,
        "refuses_to_fabricate": true
      }
    },
    "viewers": {
      "symbol": "viewers/symbol.html",
      "footprint": "viewers/footprint.html"
    },
    "models_3d": [
      {
        "file": "tpic6273n.step",
        "role": "plain",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "body on z = 0, through-hole leads below",
        "extents_mm": [
          7.874,
          26.162,
          6.98
        ],
        "zmin_mm": -3.3,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "ca359c9b9e0ce94efcb6c96866513f659eef6517d629ace3c4a0a779f6fd57bb",
        "checked": "2026-10-30",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      },
      {
        "file": "tpic6273n-etched.step",
        "role": "eda",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "body on z = 0, through-hole leads below",
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        "sha256": "686284ba4359b6aad8451fa53bcd1f1db66a5cd562784fd9d684cabf1cee6641",
        "checked": "2026-10-30",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      }
    ]
  }
}