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TPA3140D2PWPR
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Texas Instruments Audio Amplifiers, HTSSOP-28-EP. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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TPA3140D2PWPR
Texas Instruments · Audio Amplifiers · HTSSOP-28-EP
TPA3140D2PWPR from Texas Instruments, in a HTSSOP-28-EP. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | SD | input | Shutdown logic input for the audio amplifier: LOW puts the outputs in Hi-Z and HIGH enables them, with TTL logic levels referenced to AVCC. |
| 2 | FAULT | output | Open-drain output that flags short-circuit or DC-detect faults and is compliant to AVCC; tying it to SD gives auto-recovery, otherwise both fault types require cycling PVCC to reset. |
| 3 | LINP | input | Positive audio input for the left channel, biased at 3 V; connect to GND for PBTL mode. |
| 4 | LINN | input | Negative audio input for the left channel, biased at 3 V; connect to GND for PBTL mode. |
| 5 | LIMRATE | input | Sets the decay speed of the clip-free power limiter through a resistor divider from GVDD to GND; connect directly to GND to disconnect the limiter. |
| 6 | GAIN | input | Four-state amplifier gain select, set by a resistor divider from GVDD to GND to define the closed-loop gain. |
| 7 | SSCTRL | input | Spread-spectrum control set by a resistor divider from GVDD to GND to select the mode; connect to GND to disable spread spectrum. |
| 8 | LIMTHRES | input | Sets the voltage limit level for the AGL and power limiter through a resistor divider from GVDD to GND; connect directly to GVDD to disconnect the limiter. |
| 9 | GVDD | power_out | High-side FET gate-drive supply with a nominal output of 7 V, also used as the supply for the LIMTHRES limit function; add a 1-µF capacitor to ground at this pin. |
| 10 | GND | power_in | Analog signal ground. |
| 11 | RINN | input | Negative audio input for the right channel, biased at 3 V. |
| 12 | RINP | input | Positive audio input for the right channel, biased at 3 V. |
| 13 | 1SPW | input | Modulation scheme select: LOW selects BD mode and HIGH selects 1SPW mode. |
| 14 | AVCC | power_in | Analog supply for the device. |
| 15 | PVCC | power_in | Power supply for the right-channel H-bridge, connected internally to the left-channel supply inputs. |
| 16 | PVCC | power_in | Power supply for the right-channel H-bridge, connected internally to the left-channel supply inputs. |
| 17 | BSPR | bidirectional | Bootstrap I/O for the right channel positive high-side FET. |
| 18 | OUTPR | output | Class-D H-bridge positive output for the right channel. |
| 19 | GND | power_in | Power ground for the H-bridges. |
| 20 | OUTNR | output | Class-D H-bridge negative output for the right channel. |
| 21 | BSNR | bidirectional | Bootstrap I/O for the right channel negative high-side FET. |
| 22 | BSNL | bidirectional | Bootstrap I/O for the left channel negative high-side FET. |
| 23 | OUTNL | output | Class-D H-bridge negative output for the left channel. |
| 24 | GND | power_in | Power ground for the H-bridges. |
| 25 | OUTPL | output | Class-D H-bridge positive output for the left channel. |
| 26 | BSPL | bidirectional | Bootstrap I/O for the left channel positive high-side FET. |
| 27 | PVCC | power_in | Power supply for the left-channel H-bridge, connected internally to the right-channel supply inputs. |
| 28 | PVCC | power_in | Power supply for the left-channel H-bridge, connected internally to the right-channel supply inputs. |
| 29 | Thermal Pad | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | HTSSOP-28-EP |
| Category | Amplifiers/Comparators |
| Pins | 29 |
CAD (KiCad official)
- Symbol:
TPA3140D2PWPR - Footprint:
Package_SO:TSSOP-28-1EP_4.4x9.7mm_P0.65mm_EP2.85x6.7mm - 3D model: HTSSOP-28-EP (KiCad packages3D, STEP)
- 3D model files:
tpa3140d2pwpr-etched.step/tpa3140d2pwpr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);tpa3140d2pwpr.step/tpa3140d2pwpr.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (42 pp, sha256
b4f2dab28f53bd3b, retrieved 2026-10-08, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# TPA3140D2PWPR
**Texas Instruments** · Audio Amplifiers · HTSSOP-28-EP
TPA3140D2PWPR from Texas Instruments, in a HTSSOP-28-EP. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | SD | input | Shutdown logic input for the audio amplifier: LOW puts the outputs in Hi-Z and HIGH enables them, with TTL logic levels referenced to AVCC. |
| 2 | FAULT | output | Open-drain output that flags short-circuit or DC-detect faults and is compliant to AVCC; tying it to SD gives auto-recovery, otherwise both fault types require cycling PVCC to reset. |
| 3 | LINP | input | Positive audio input for the left channel, biased at 3 V; connect to GND for PBTL mode. |
| 4 | LINN | input | Negative audio input for the left channel, biased at 3 V; connect to GND for PBTL mode. |
| 5 | LIMRATE | input | Sets the decay speed of the clip-free power limiter through a resistor divider from GVDD to GND; connect directly to GND to disconnect the limiter. |
| 6 | GAIN | input | Four-state amplifier gain select, set by a resistor divider from GVDD to GND to define the closed-loop gain. |
| 7 | SSCTRL | input | Spread-spectrum control set by a resistor divider from GVDD to GND to select the mode; connect to GND to disable spread spectrum. |
| 8 | LIMTHRES | input | Sets the voltage limit level for the AGL and power limiter through a resistor divider from GVDD to GND; connect directly to GVDD to disconnect the limiter. |
| 9 | GVDD | power_out | High-side FET gate-drive supply with a nominal output of 7 V, also used as the supply for the LIMTHRES limit function; add a 1-µF capacitor to ground at this pin. |
| 10 | GND | power_in | Analog signal ground. |
| 11 | RINN | input | Negative audio input for the right channel, biased at 3 V. |
| 12 | RINP | input | Positive audio input for the right channel, biased at 3 V. |
| 13 | 1SPW | input | Modulation scheme select: LOW selects BD mode and HIGH selects 1SPW mode. |
| 14 | AVCC | power_in | Analog supply for the device. |
| 15 | PVCC | power_in | Power supply for the right-channel H-bridge, connected internally to the left-channel supply inputs. |
| 16 | PVCC | power_in | Power supply for the right-channel H-bridge, connected internally to the left-channel supply inputs. |
| 17 | BSPR | bidirectional | Bootstrap I/O for the right channel positive high-side FET. |
| 18 | OUTPR | output | Class-D H-bridge positive output for the right channel. |
| 19 | GND | power_in | Power ground for the H-bridges. |
| 20 | OUTNR | output | Class-D H-bridge negative output for the right channel. |
| 21 | BSNR | bidirectional | Bootstrap I/O for the right channel negative high-side FET. |
| 22 | BSNL | bidirectional | Bootstrap I/O for the left channel negative high-side FET. |
| 23 | OUTNL | output | Class-D H-bridge negative output for the left channel. |
| 24 | GND | power_in | Power ground for the H-bridges. |
| 25 | OUTPL | output | Class-D H-bridge positive output for the left channel. |
| 26 | BSPL | bidirectional | Bootstrap I/O for the left channel positive high-side FET. |
| 27 | PVCC | power_in | Power supply for the left-channel H-bridge, connected internally to the right-channel supply inputs. |
| 28 | PVCC | power_in | Power supply for the left-channel H-bridge, connected internally to the right-channel supply inputs. |
| 29 | Thermal Pad | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | HTSSOP-28-EP |
| Category | Amplifiers/Comparators |
| Pins | 29 |
## CAD (KiCad official)
- Symbol: `TPA3140D2PWPR`
- Footprint: `Package_SO:TSSOP-28-1EP_4.4x9.7mm_P0.65mm_EP2.85x6.7mm`
- 3D model: HTSSOP-28-EP (KiCad packages3D, STEP)
- 3D model files: `tpa3140d2pwpr-etched.step` / `tpa3140d2pwpr-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `tpa3140d2pwpr.step` / `tpa3140d2pwpr.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/tpa3140d2) (42 pp, sha256 `b4f2dab28f53bd3b`, retrieved 2026-10-08, tier: lcsc)
- **Datasheet language:** Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/tpa3140d2pwpr-datasheet.pdf)