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TPA3140D2PWPR
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Texas Instruments Audio Amplifiers, HTSSOP-28-EP. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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README.mdadded+66@@ -0,0 +1,66 @@+# TPA3140D2PWPR++**Texas Instruments** · Audio Amplifiers · HTSSOP-28-EP++TPA3140D2PWPR from Texas Instruments, in a HTSSOP-28-EP. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | SD | input | Shutdown logic input for the audio amplifier: LOW puts the outputs in Hi-Z and HIGH enables them, with TTL logic levels referenced to AVCC. |+| 2 | FAULT | output | Open-drain output that flags short-circuit or DC-detect faults and is compliant to AVCC; tying it to SD gives auto-recovery, otherwise both fault types require cycling PVCC to reset. |+| 3 | LINP | input | Positive audio input for the left channel, biased at 3 V; connect to GND for PBTL mode. |+| 4 | LINN | input | Negative audio input for the left channel, biased at 3 V; connect to GND for PBTL mode. |+| 5 | LIMRATE | input | Sets the decay speed of the clip-free power limiter through a resistor divider from GVDD to GND; connect directly to GND to disconnect the limiter. |+| 6 | GAIN | input | Four-state amplifier gain select, set by a resistor divider from GVDD to GND to define the closed-loop gain. |+| 7 | SSCTRL | input | Spread-spectrum control set by a resistor divider from GVDD to GND to select the mode; connect to GND to disable spread spectrum. |+| 8 | LIMTHRES | input | Sets the voltage limit level for the AGL and power limiter through a resistor divider from GVDD to GND; connect directly to GVDD to disconnect the limiter. |+| 9 | GVDD | power_out | High-side FET gate-drive supply with a nominal output of 7 V, also used as the supply for the LIMTHRES limit function; add a 1-µF capacitor to ground at this pin. |+| 10 | GND | power_in | Analog signal ground. |+| 11 | RINN | input | Negative audio input for the right channel, biased at 3 V. |+| 12 | RINP | input | Positive audio input for the right channel, biased at 3 V. |+| 13 | 1SPW | input | Modulation scheme select: LOW selects BD mode and HIGH selects 1SPW mode. |+| 14 | AVCC | power_in | Analog supply for the device. |+| 15 | PVCC | power_in | Power supply for the right-channel H-bridge, connected internally to the left-channel supply inputs. |+| 16 | PVCC | power_in | Power supply for the right-channel H-bridge, connected internally to the left-channel supply inputs. |+| 17 | BSPR | bidirectional | Bootstrap I/O for the right channel positive high-side FET. |+| 18 | OUTPR | output | Class-D H-bridge positive output for the right channel. |+| 19 | GND | power_in | Power ground for the H-bridges. |+| 20 | OUTNR | output | Class-D H-bridge negative output for the right channel. |+| 21 | BSNR | bidirectional | Bootstrap I/O for the right channel negative high-side FET. |+| 22 | BSNL | bidirectional | Bootstrap I/O for the left channel negative high-side FET. |+| 23 | OUTNL | output | Class-D H-bridge negative output for the left channel. |+| 24 | GND | power_in | Power ground for the H-bridges. |+| 25 | OUTPL | output | Class-D H-bridge positive output for the left channel. |+| 26 | BSPL | bidirectional | Bootstrap I/O for the left channel positive high-side FET. |+| 27 | PVCC | power_in | Power supply for the left-channel H-bridge, connected internally to the right-channel supply inputs. |+| 28 | PVCC | power_in | Power supply for the left-channel H-bridge, connected internally to the right-channel supply inputs. |+| 29 | Thermal Pad | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | Texas Instruments |+| Package | HTSSOP-28-EP |+| Category | Amplifiers/Comparators |+| Pins | 29 |++## CAD (KiCad official)++- Symbol: `TPA3140D2PWPR`+- Footprint: `Package_SO:TSSOP-28-1EP_4.4x9.7mm_P0.65mm_EP2.85x6.7mm`+- 3D model: HTSSOP-28-EP (KiCad packages3D, STEP)+- 3D model files: `tpa3140d2pwpr-etched.step` / `tpa3140d2pwpr-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `tpa3140d2pwpr.step` / `tpa3140d2pwpr.glb` are the bare package body.++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/tpa3140d2) (42 pp, sha256 `b4f2dab28f53bd3b`, retrieved 2026-10-08, tier: lcsc)+- **Datasheet language:** Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.+- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/tpa3140d2pwpr-datasheet.pdf)
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Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",+ "tags": [+ "component",+ "amplifiers-comparators",+ "tpa3140d2pwpr",+ "factory-2.0.0",+ "extractor-text"+ ],+ "dependencies": {},+ "hero": {+ "type": "image",+ "path": "docs/hero.png"+ },+ "files": [+ "page.json",+ "README.md",+ "tpa3140d2pwpr.kicad_sym",+ "tpa3140d2pwpr.kicad_mod",+ "tpa3140d2pwpr.glb",+ "tpa3140d2pwpr.step",+ "tpa3140d2pwpr.lbr",+ "docs/hero.png",+ "docs/tpa3140d2pwpr-datasheet.pdf",+ "viewers/symbol.html",+ "viewers/footprint.html",+ "tpa3140d2pwpr-hero.glb",+ "tpa3140d2pwpr-hero.overlay.json"+ ],+ "component": {+ "mpn": "TPA3140D2PWPR",+ "manufacturer": "Texas Instruments",+ "package": "HTSSOP-28-EP",+ "pin_count": 29,+ "category": "Amplifiers/Comparators",+ "subcategory": "Audio Amplifiers",+ "datasheet": "https://www.ti.com/cn/lit/gpn/tpa3140d2",+ "parts": {+ "symbol": "tpa3140d2pwpr.kicad_sym",+ "footprint": "tpa3140d2pwpr.kicad_mod",+ "model_3d": "tpa3140d2pwpr-hero.glb",+ "model_3d_plain": "tpa3140d2pwpr.glb",+ "model_3d_step": "tpa3140d2pwpr-etched.step",+ "model_3d_step_plain": "tpa3140d2pwpr.step",+ "lbr": "tpa3140d2pwpr.lbr"+ },+ "distributor_links": {+ "lcsc": "C527677",+ "digikey": "296-47291-2-ND",+ "mouser": "595-TPA3140D2PWPR"+ },+ "distributor_check": {+ "checked_at": "2026-10-08T04:02:59Z",+ "source": "Component Ocean /api/assign-pns",+ "digikey": {+ "pn": "296-47291-2-ND",+ "status": "found",+ "lifecycle": "Active"+ },+ "mouser": {+ "pn": "595-TPA3140D2PWPR",+ "status": "found"+ }+ },+ "pins": [+ {+ "number": "1",+ "name": "SD",+ "type": "input",+ "description": "Shutdown logic input for the audio amplifier: LOW puts the outputs in Hi-Z and HIGH enables them, with TTL logic levels referenced to AVCC."+ },+ {+ "number": "2",+ "name": "FAULT",+ "type": "output",+ "description": "Open-drain output that flags short-circuit or DC-detect faults and is compliant to AVCC; tying it to SD gives auto-recovery, otherwise both fault types require cycling PVCC to reset."+ },+ {+ "number": "3",+ "name": "LINP",+ "type": "input",+ "description": "Positive audio input for the left channel, biased at 3 V; connect to GND for PBTL mode."+ },+ {+ "number": "4",+ "name": "LINN",+ "type": "input",+ "description": "Negative audio input for the left channel, biased at 3 V; connect to GND for PBTL mode."+ },+ {+ "number": "5",+ "name": "LIMRATE",+ "type": "input",+ "description": "Sets the decay speed of the clip-free power limiter through a resistor divider from GVDD to GND; connect directly to GND to disconnect the limiter."+ },+ {+ "number": "6",+ "name": "GAIN",+ "type": "input",+ "description": "Four-state amplifier gain select, set by a resistor divider from GVDD to GND to define the closed-loop gain."+ },+ {+ "number": "7",+ "name": "SSCTRL",+ "type": "input",+ "description": "Spread-spectrum control set by a resistor divider from GVDD to GND to select the mode; connect to GND to disable spread spectrum."+ },+ {+ "number": "8",+ "name": "LIMTHRES",+ "type": "input",+ "description": "Sets the voltage limit level for the AGL and power limiter through a resistor divider from GVDD to GND; connect directly to GVDD to disconnect the limiter."+ },+ {+ "number": "9",+ "name": "GVDD",+ "type": "power_out",+ "description": "High-side FET gate-drive supply with a nominal output of 7 V, also used as the supply for the LIMTHRES limit function; add a 1-µF capacitor to ground at this pin."+ },+ {+ "number": "10",+ "name": "GND",+ "type": "power_in",+ "description": "Analog signal ground."+ },+ {+ "number": "11",+ "name": "RINN",+ "type": "input",+ "description": "Negative audio input for the right channel, biased at 3 V."+ },+ {+ "number": "12",+ "name": "RINP",+ "type": "input",+ "description": "Positive audio input for the right channel, biased at 3 V."+ },+ {+ "number": "13",+ "name": "1SPW",+ "type": "input",+ "description": "Modulation scheme select: LOW selects BD mode and HIGH selects 1SPW mode."+ },+ {+ "number": "14",+ "name": "AVCC",+ "type": "power_in",+ "description": "Analog supply for the device."+ },+ {+ "number": "15",+ "name": "PVCC",+ "type": "power_in",+ "description": "Power supply for the right-channel H-bridge, connected internally to the left-channel supply inputs."+ },+ {+ "number": "16",+ "name": "PVCC",+ "type": "power_in",+ "description": "Power supply for the right-channel H-bridge, connected internally to the left-channel supply inputs."+ },+ {+ "number": "17",+ "name": "BSPR",+ "type": "bidirectional",+ "description": "Bootstrap I/O for the right channel positive high-side FET."+ },+ {+ "number": "18",+ "name": "OUTPR",+ "type": "output",+ "description": "Class-D H-bridge positive output for the right channel."+ },+ {+ "number": "19",+ "name": "GND",+ "type": "power_in",+ "description": "Power ground for the H-bridges."+ },+ {+ "number": "20",+ "name": "OUTNR",+ "type": "output",+ "description": "Class-D H-bridge negative output for the right channel."+ },+ {+ "number": "21",+ "name": "BSNR",+ "type": "bidirectional",+ "description": "Bootstrap I/O for the right channel negative high-side FET."+ },+ {+ "number": "22",+ "name": "BSNL",+ "type": "bidirectional",+ "description": "Bootstrap I/O for the left channel negative high-side FET."+ },+ {+ "number": "23",+ "name": "OUTNL",+ "type": "output",+ "description": "Class-D H-bridge negative output for the left channel."+ },+ {+ "number": "24",+ "name": "GND",+ "type": "power_in",+ "description": "Power ground for the H-bridges."+ },+ {+ "number": "25",+ "name": "OUTPL",+ "type": "output",+ "description": "Class-D H-bridge positive output for the left channel."+ },+ {+ "number": "26",+ "name": "BSPL",+ "type": "bidirectional",+ "description": "Bootstrap I/O for the left channel positive high-side FET."+ },+ {+ "number": "27",+ "name": "PVCC",+ "type": "power_in",+ "description": "Power supply for the left-channel H-bridge, connected internally to the right-channel supply inputs."+ },+ {+ "number": "28",+ "name": "PVCC",+ "type": "power_in",+ "description": "Power supply for the left-channel H-bridge, connected internally to the right-channel supply inputs."+ },+ {+ "number": "29",+ "name": "Thermal Pad",+ "type": "passive",+ "description": "Exposed pad (from the footprint; not named in the datasheet pin table)."+ }+ ],+ "provenance": {+ "extractor": "extract_pins 0.3",+ "factory_chain": {+ "factory": "2.0.0",+ "extractor": "extract_pins 0.3",+ "primary_model": "claude-haiku-5-5",+ "primary_mode": "text",+ "consensus_model": "claude-sonnet-5-5",+ "consensus": "agreed",+ "guards": "pin_guards 0.1: passed",+ "guard_notes": [+ "extractor flagged: The exposed thermal pad is listed in the pin table (page 4) as 'Thermal Pad' with no pin number, so ; Pin types were mapped to KiCad classes from the datasheet's I/O/P column: GVDD is printed 'O' and is; Package is confirmed by the order addendum (page 33): TPA3140D2PWPR is HTSSOP (PWP), 28 pins, 2000-p",+ "exposed pad 29 added from the footprint"+ ],+ "pages_sent": 11,+ "cost_usd": 0.0756,+ "at": "2026-10-08T04:02:39"+ },+ "datasheet": {+ "url": "https://www.ti.com/cn/lit/gpn/tpa3140d2",+ "pages": 42,+ "sha256": "b4f2dab28f53bd3b",+ "source_tier": "lcsc"+ },+ "cad": "KiCad official (CC-BY-SA 4.0)",+ "pins": {+ "total": 29,+ "described": 29,+ "cites_pages": true,+ "refuses_to_fabricate": true+ }+ },+ "viewers": {+ "symbol": "viewers/symbol.html",+ "footprint": "viewers/footprint.html"+ },+ "models_3d": [+ {+ "file": "tpa3140d2pwpr.step",+ "role": "plain",+ "up": "Z",+ "units": "mm",+ "origin": "footprint origin = pad-pattern centre",+ "seat": "z = 0",+ "extents_mm": [+ 7.2,+ 9.7,+ 1.05+ ],+ "zmin_mm": 0,+ "centre_offset_mm": 0,+ "footprint_binding": "identity",+ "sha256": "ff242f1d3be9d09e7f929707a2c5b1ee974a4f882053b04bcdb1cd2cb21223ef",+ "checked": "2026-10-08",+ "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+ },+ {+ "file": "tpa3140d2pwpr-etched.step",+ "role": "eda",+ "up": "Z",+ "units": "mm",+ "origin": "footprint origin = pad-pattern centre",+ "seat": "z = 0",+ "extents_mm": [+ 7.2,+ 9.7,+ 1.05+ ],+ "zmin_mm": 0,+ "centre_offset_mm": 0,+ "footprint_binding": "identity",+ "sha256": "c9f262e83aca5f5481f4ddf502ecde892f428810760d9d5f24bb9d82524d0430",+ "checked": "2026-10-08",+ "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+ }+ ]+ },+ "visibility": "public",+ "org": "adom",+ "author": {+ "name": "Ray",+ "email": "[email protected]"+ }+}