TPA3110D2PWP

{
  "slug": "tpa3110d2pwp",
  "version": "0.1.0",
  "type": "component",
  "description": "Texas Instruments Pre-ordered Chips, HTSSOP-28-EP. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
  "tags": [
    "component",
    "interface ics",
    "tpa3110d2pwp",
    "factory-2.0.0",
    "extractor-text"
  ],
  "dependencies": {},
  "hero": {
    "type": "image",
    "path": "docs/hero.png"
  },
  "files": [
    "page.json",
    "README.md",
    "tpa3110d2pwp.kicad_sym",
    "tpa3110d2pwp.kicad_mod",
    "tpa3110d2pwp.glb",
    "tpa3110d2pwp.step",
    "tpa3110d2pwp.lbr",
    "docs/hero.png",
    "docs/tpa3110d2pwp-datasheet.pdf",
    "viewers/symbol.html",
    "viewers/footprint.html",
    "tpa3110d2pwp-hero.glb",
    "tpa3110d2pwp-hero.overlay.json",
    "tpa3110d2pwp-etched.glb"
  ],
  "component": {
    "mpn": "TPA3110D2PWP",
    "manufacturer": "Texas Instruments",
    "package": "HTSSOP-28-EP",
    "pin_count": 29,
    "category": "Interface ICs",
    "subcategory": "Pre-ordered Chips",
    "datasheet": "https://www.ti.com/cn/lit/gpn/tpa3110d2",
    "parts": {
      "symbol": "tpa3110d2pwp.kicad_sym",
      "footprint": "tpa3110d2pwp.kicad_mod",
      "model_3d": "tpa3110d2pwp-hero.glb",
      "model_3d_plain": "tpa3110d2pwp-etched.glb",
      "model_3d_step": "tpa3110d2pwp-etched.step",
      "model_3d_step_plain": "tpa3110d2pwp.step",
      "lbr": "tpa3110d2pwp.lbr"
    },
    "distributor_links": {
      "lcsc": "C2879328",
      "digikey": "296-24968-5-ND",
      "mouser": "595-TPA3110D2PWP"
    },
    "distributor_check": {
      "checked_at": "2026-10-23T06:19:46Z",
      "source": "Component Ocean /api/assign-pns",
      "digikey": {
        "pn": "296-24968-5-ND",
        "status": "found",
        "lifecycle": "Active"
      },
      "mouser": {
        "pn": "595-TPA3110D2PWP",
        "status": "found"
      }
    },
    "pins": [
      {
        "number": "1",
        "name": "SD",
        "type": "input",
        "description": "Shutdown logic input for audio amp (LOW = outputs Hi-Z, HIGH = outputs enabled), TTL logic levels with compliance to AVCC."
      },
      {
        "number": "2",
        "name": "FAULT",
        "type": "output",
        "description": "Open drain output showing short circuit or DC detect fault status, voltage compliant to AVCC; connect to SD for short-circuit auto-recovery, otherwise cycle PVCC to reset faults."
      },
      {
        "number": "3",
        "name": "LINP",
        "type": "input",
        "description": "Positive audio input for left channel, biased at 3 V."
      },
      {
        "number": "4",
        "name": "LINN",
        "type": "input",
        "description": "Negative audio input for left channel, biased at 3 V."
      },
      {
        "number": "5",
        "name": "GAIN0",
        "type": "input",
        "description": "Gain select least significant bit, TTL logic levels with compliance to AVCC."
      },
      {
        "number": "6",
        "name": "GAIN1",
        "type": "input",
        "description": "Gain select most significant bit, TTL logic levels with compliance to AVCC."
      },
      {
        "number": "7",
        "name": "AVCC",
        "type": "power_in",
        "description": "Analog supply."
      },
      {
        "number": "8",
        "name": "AGND",
        "type": "power_in",
        "description": "Analog signal ground, connect to the thermal pad."
      },
      {
        "number": "9",
        "name": "GVDD",
        "type": "power_out",
        "description": "High-side FET gate drive supply, nominal 7 V, also used as supply for the PLIMIT function."
      },
      {
        "number": "10",
        "name": "PLIMIT",
        "type": "input",
        "description": "Power limit level adjust: connect a resistor divider from GVDD to GND to set the limit, or connect directly to GVDD for no power limit."
      },
      {
        "number": "11",
        "name": "RINN",
        "type": "input",
        "description": "Negative audio input for right channel, biased at 3 V."
      },
      {
        "number": "12",
        "name": "RINP",
        "type": "input",
        "description": "Positive audio input for right channel, biased at 3 V."
      },
      {
        "number": "13",
        "name": "NC",
        "type": "unconnected",
        "description": "Not connected."
      },
      {
        "number": "14",
        "name": "PBTL",
        "type": "input",
        "description": "Parallel BTL mode switch: tie high for PBTL (mono) mode, connect to local ground for normal BTL operation."
      },
      {
        "number": "15",
        "name": "PVCCR",
        "type": "power_in",
        "description": "Power supply for right channel H-bridge, connected internally to the left channel supply inputs."
      },
      {
        "number": "16",
        "name": "PVCCR",
        "type": "power_in",
        "description": "Power supply for right channel H-bridge, connected internally to the left channel supply inputs."
      },
      {
        "number": "17",
        "name": "BSPR",
        "type": "passive",
        "description": "Bootstrap I/O for right channel, positive high-side FET."
      },
      {
        "number": "18",
        "name": "OUTPR",
        "type": "output",
        "description": "Class-D H-bridge positive output for right channel."
      },
      {
        "number": "19",
        "name": "PGND",
        "type": "power_in",
        "description": "Power ground for the H-bridges."
      },
      {
        "number": "20",
        "name": "OUTNR",
        "type": "output",
        "description": "Class-D H-bridge negative output for right channel."
      },
      {
        "number": "21",
        "name": "BSNR",
        "type": "passive",
        "description": "Bootstrap I/O for right channel, negative high-side FET."
      },
      {
        "number": "22",
        "name": "BSNL",
        "type": "passive",
        "description": "Bootstrap I/O for left channel, negative high-side FET."
      },
      {
        "number": "23",
        "name": "OUTNL",
        "type": "output",
        "description": "Class-D H-bridge negative output for left channel."
      },
      {
        "number": "24",
        "name": "PGND",
        "type": "power_in",
        "description": "Power ground for the H-bridges."
      },
      {
        "number": "25",
        "name": "OUTPL",
        "type": "output",
        "description": "Class-D H-bridge positive output for left channel."
      },
      {
        "number": "26",
        "name": "BSPL",
        "type": "passive",
        "description": "Bootstrap I/O for left channel, positive high-side FET."
      },
      {
        "number": "27",
        "name": "PVCCL",
        "type": "power_in",
        "description": "Power supply for left channel H-bridge, connected internally to the right channel supply inputs."
      },
      {
        "number": "28",
        "name": "PVCCL",
        "type": "power_in",
        "description": "Power supply for left channel H-bridge, connected internally to the right channel supply inputs."
      },
      {
        "number": "29",
        "name": "PowerPAD",
        "type": "power_in",
        "description": "Exposed thermal pad (GND) that must be connected to a thermally dissipating plane, and to which AGND is connected, to avoid thermal protection shutdown."
      }
    ],
    "provenance": {
      "extractor": "extract_pins 0.3",
      "factory_chain": {
        "factory": "2.0.0",
        "extractor": "extract_pins 0.3",
        "primary_model": "claude-sonnet-5-5",
        "primary_mode": "text",
        "consensus_model": "claude-sonnet-5-5",
        "consensus": "agreed",
        "guards": "pin_guards 0.1: passed",
        "guard_notes": [
          "extractor flagged: Datasheet lists bootstrap pins as type 'I' (Bootstrap I/O); mapped to passive since they connect to ; Exposed pad number 29 is taken from the application schematic (GND 29 PowerPAD), not from the pin ta; Duplicate-name supply pins (PVCCR 15/16, PVCCL 27/28, PGND 19/24) are separate package pins with the"
        ],
        "pages_sent": 12,
        "cost_usd": 0.1549,
        "at": "2026-10-23T06:18:56"
      },
      "datasheet": {
        "url": "https://www.ti.com/cn/lit/gpn/tpa3110d2",
        "pages": 34,
        "sha256": "065211f4befd1734",
        "source_tier": "lcsc"
      },
      "cad": "KiCad official (CC-BY-SA 4.0)",
      "pins": {
        "total": 29,
        "described": 29,
        "cites_pages": true,
        "refuses_to_fabricate": true
      }
    },
    "viewers": {
      "symbol": "viewers/symbol.html",
      "footprint": "viewers/footprint.html"
    },
    "models_3d": [
      {
        "file": "tpa3110d2pwp.step",
        "role": "plain",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          7.2,
          9.7,
          1.05
        ],
        "zmin_mm": 0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "ff242f1d3be9d09e7f929707a2c5b1ee974a4f882053b04bcdb1cd2cb21223ef",
        "checked": "2026-10-23",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      },
      {
        "file": "tpa3110d2pwp-etched.step",
        "role": "eda",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          7.2,
          9.7,
          1.05
        ],
        "zmin_mm": 0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "7e929c70819e9c3a7dd488d68e4a2958b0926700506f3d0f3ae4d928dd1d2a3e",
        "checked": "2026-10-23",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      }
    ]
  }
}